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DIR9001: Periodic error

Part Number: DIR9001

Hi team,

My customer found that the periodic errors came out in their system like following capture.

Their usecase is as follows.

Sampling rate : 44.1kHz

Operation mode : AUTO mode, but the same error happens in PLL mode.

Input data : SPDIF

Could you give me your thought about the cause of this error?

I asked customer to probe CLKST to distinguish between PLL unlock and parity error. Are there anything customer should check?

Regards,

Saito

  • Hello Saito-san,
    can you please give me more details regarding the S/PDIF source? Is this generated by AP or is there a different source? Also, can you please share the SCH for me to make sure the device is properly configured? For ex: FILT configuration is critical in making sure the PLL error does not occur.

    Looking forward to additional info to help resolve the issue.

    Please note that due to holidays here, most of our apps engg will be out-of-office for until Xmas and New Year. But we will do our best to resolve the issue in a timely manner.

    Thanks & Best regards,
    Ravi
  • Hi Patil,

    Thank you for your reply.
    I will check the source and schematic. I will get you back when I get the information.

    Regards,
    Saito
  • Hi Patil,

    S/PDIF source is their device. The S/PDIF data is not sent by an audio analyzer like AP
    My customer can share the S/PDIF waveform of only preamble part. Is that enough data?
    About the schematic, it's take more time to share it with us. I appreciate if you could review the waveform before the schematic revie.

    Also, I have another question as follows.
    1) Is there an internal pullup resistor on ERROR pin? If so, could you confirm the resister value?

    2) After ERROR comes up, is there any period to keep the device ERROR pin to HIGH even though ERROR has been eliminated?

    Regards,
    Saito