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PCM1865: Minimum setting for MASTER mode

Part Number: PCM1865

I wonder if there is a reference setting for following configuration of PCM1865.

* Master clock: 25Mhz X-tal

* Analog inputs: VINL1 and VINR1

* Sampling rate: 44.1Khz

* Bitwidth: 24-bit

* Running mode: master

* Interfacing: I2S

I presume that following registers might be related.

* 0x06: PCM186X_ADC1_INPUT_SEL_L = to select VINL1

* 0x07: PCM186X_ADC1_INPUT_SEL_R = to select VINR1

* 0x0B: PCM186X_PCM_CFG = to set 24-bit and I2S

* 0x20: PCM186X_CLK_CTRL = to set XTAL, MASTER, PLL, CLKDET_EN (do I need to use CLKDET_EN and PLL)

* 0x26: PCM186X_BCK_DIV= to set BCK division

* 0x27: PCM186X_LRK_DIV = to set LRCK division

Any comments would be appreciated. Thanks.

Ando.

  • Hi Ando,
    I realize that you have a separate thread where you were enquiring about the PCM186x device in SLAVE mode where we do not need the MASTER clock.

    Based on this thread, I see that the question eludes to MASTER mode. Here we do need XTI input and I do see that you are not using one of the standard audio master clock frequency (such as 24.576MHz) and instead using 25MHz clock. Is there a chance you can use 24.576MHz crystal?

    The part would require specific dividers for getting it working w non-audio freq and I can provide the specific config after testing the same on the EVM. But if you do use the 24.576MHz clock in master mode, you can use AUTO CONFIG as mentioned in earlier thread.

    Please let me know if you want to use the device in MASTER or SLAVE mode and we can get you set up w the required config. Thanks.

    Best regards,
    Ravi