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TLV320AIC23B: Problem Muting ADC Left/Right I2S channels to test for driver audio swap

Part Number: TLV320AIC23B


I'm working with a board design that uses the TLV320AIC23b as an ADC interfacing to a TI part with a MCASP interface.  We've found that something in the processor's audio stack will unpredictably swap l2S left/right channels on startup.  I've been unable to remedy the swapping issue, and so we resolved on some other designs that have an FPGA between the ADC and the processor to insert a test pattern using the FPGA to test and correct for this.  

With the direct tlv->MCASP interface, we have no way to insert a test pattern, so my idea is to try muting either left or right in the ADC, but this doesn't appear to be working.  I use the following shell script to set up the chip and get a test audio file:

tlv_addr=0x1a

tlv_write_reg ()
{
	reg_addr=$1
	reg_ls8=$2 #low 8 bits
	reg_msb=$3

	i2c_addr=$(( $((${reg_addr} << 1)) | ${reg_msb} ))

	set -x
	i2cset -f -y 1 ${tlv_addr} ${i2c_addr} ${reg_ls8}
	set +x 
}


tlv_write_reg 15 0 0 #reset
sleep 1
tlv_write_reg 0 0x1f 0 #Left mute, no simultaneous update tlv_write_reg 1 0x80 0 #Right full volume, no simultaneous update tlv_write_reg 2 0x80 0 #Mute Left headphone tlv_write_reg 3 0x80 0 #Mute right headphone tlv_write_reg 4 0x02 0 #Disable DAC, disable side tone, disable bypass, Line in selected, mute microphone, no mic boost tlv_write_reg 5 0x00 0 #Disable: dac soft-mute, de-emphasis, ADC high-pass tlv_write_reg 6 0x0a 0 #Power on, Clock on, Osc on, outputs on, DAC off, ADC on, Mic Off, Line in on tlv_write_reg 7 0x4e 0 #Master mode, No LRSwap, no Phase swap, 32b I2S tlv_write_reg 8 0x00 0 #no clk in div, sr=48k, BOSR=256f_s, normal mode(not USB) tlv_write_reg 9 0x01 0 #activate digital interface arecord -D hw:0,0 -d5 -fS32_LE -c2 -r48000 test_liveswap.raw & sleep 2 tlv_write_reg 0 0x80 0 #Left mute, no simultaneous update tlv_write_reg 1 0x1f 0 #Right full volume, no simultaneous update #Expect to see the lower-bit noise swap channels. We have to swap #while the processor interface is active, as it will unpredictably #swap l/r on reset of the MCASP interface wait $!

Since I can't guarantee any actual activity on the analog inputs, the plan was to capture in 32 bit mode with one channel muted and hope there is enough noise on the board to cause activity in the lower bits of a non-muted channel.  When inspecting the captured audio, I do see noise in the lower bits, but it's on both channels and there's no apparent change really through the duration of the recording.  Here I interpret it as 4 channels of 16b audio to better visualize the lower bits:

As you see the test recording shows neither channel is effectively muted, making it impossible to test for channel swapping in software.  Is there some way to force the output of a selected channel to all zeroes?  Or perhaps some other way I can test for hardware channel swapping in the MCASP/linux audio stack?