TAS5731M: Description of datasheet

Hi,

A customer asks us questions about TAS5731M datasheet.

Q1. The PWM modulators are only three channels in block diagram of PPC1/TAS5731.
He cannot understand how DAP channel corresponds with PWM channel of 9.6.18 PWM Output Mux Register (0x25).

Q2. (if bit D5 is set to 0 in system control register 2, 0x05).
There is the above description in section 9.6.12 PWM Shutdown Group Register (0x19).
However, system control register 2 bit D5 must be always zero.
Because D5 is a reserved bit that do not change the value, and its initial value is zero.
He cannot understand what this description means.

Q3. What is IDF? What is purpose of IDF post scale register?

Best regards,

Akio Ito