Customer can get EVM to work well at 48KHz. In some use case, customer requires 8KHz sampling.
1) Is there a block diagram of the clocking structure of the TAS2557. The block diagram on page 18 of the datasheet just shows the 'Programmable PLL' with no more information.
2) Can provide full list of registers? At the moment the configuration we are using from the eval board is programming many register that are not in the datasheet.
Customer is using the BCLK of ASI1 as clock input. It goes into PLL and the output of the PLL is used as the MAIN_CLK for the device. We guess we need to usePLL to get to 12.288MHz but can't see anywhere to set it.
