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Hello
We are developing a wearable audio product that requires multi-channel digital mixing and some light signal processing.
As a part of this system we need an audio processor that can handle:
3 digital audio inputs (PCM ) OR 2 digital audio inputs and have the capability of hosting a sample player
2 digital microphones configured as one stereo pair
The actual processing required
- mixing the digital audio sources and the microphones together
- a limiter/squelch on the microphones to make them cut out at high volumes
- side-chaining (i.e. lowering the volume on one channel when signal is present on another)
Additional requirements are:
- low latency (no more than 10 ms from microphone input to audio output)
- low power
One possible solution to this is might be the TLV320AIC3268 codec, but with regard to this we have a few questions.
1. Are there any other circuits from Ti that you think might be more suitable for our applications?
2. Is the DSP on TLV320AIC3268 powerful enough to handle our requirements?
3. Is it possible to implement a sample player on the TLV320AIC3268 in addition to all our other requirements? if yes, is it also powerful enough to handle ogg decoding?
4. Are there any aproximate figures for power consumption? could we expect it to be in the order of 1 W, 500 mW or 50 mW?
5. TLV320A series seams to be programmed with PurePath studio, however the installer for the portable audio version gives me an "1152: error extraxting to the temporary location" when I try to install it. Is this a known problem?
Hello Diljith, and many thanks for your informative reply!
If the circuit cannot handle ogg decoding we will locate the sample player in another circuit and stream the audio to the codec via one of the I2S ports, so implementing a sample player in TLV320 is no longer relevant
Is it possible to handle several parallel audio streams in the codec?
For example lets say we have two pairs of stereo mics interfaced via the digital mic function. Can we route digital mic 1 to the analog audio output and digital mic 2 to I2S1 out without mixing them two?
BR
Joakim
Hello Diljith!
This is very useful information, thank you!
In our system we want to run the DSP at 48 kHz, two I2S streams at 48 kHz and one I2S stream at 16 kHz, and we want the 16 kHz samples to be repeated rather than the faster interfaces to drop samples. Is it possible to do sample repetition when sample rates are an even multiple of each others without the ASRC or do we need that one to perform any kind of conversion?
Additionally is there a good document with comparisons of the different chips in the AIS32xx family anywhere?
I know that this page exist:
http://www.ti.com/audio-ic/converters/codec/products.html
But that one doesn't list important things like number of I2S buses and nifty features like ASRC.
BR
Joakim
Hi Joakim,
For this case ASRC is not required. The samples of the 16KHz stream would get repeated thrice since the DSP is running three times faster than the I2S interface. No additional component is required to achieve this behavior.
In the AIC32xx family of miniDSP-enabled devices, AIC3262 and AIC3268 are the devices that have 3 I2S interfaces; the AIC3262 is the only one that has the ASRC. The link you shared is indeed the recommended page to get the comparison information. Thanks for your feedback on including additional parameters into the comparison table.
Regards,
Diljith M. Thodi
Hello Again Diljith !
As I stated in my initial question, we need to interface 2 digital stereo microphones and 3 I2S audio interfaces operating simultaneously. After some reshuffling I think I have come up with a solution that is viable. However in order to reach it I Had to move the host processors audio interface to ASI3. Is it okay that host audio both drives MCLK and interfaces with ASI3?
Additional, can you used GPIO4 as a digital mic input while GPIO 1, 2 and 3 simultaneously works as an I2S interface? (this interface only need BCLK, WCLK & DIN, not output data should be sent to host)
Additionally, according to datasheet page 110-111 (section 8.3.10 miniDSP_D) it seams like the internal mixing only supports 3 data inputs to mini DSP_D. In our use case, we want to mix the 3 I2S sources with one of the digital mic pairs. Is there some way to cirumvent this and send four sources to miniDSP_D.
BR
Joakim
Joakim,
Please note that AIC3262 cannot support four digital microphone channels. It has only two CIC filters and so only two digital microphone channels can be supported. AIC3268 has two additional CIC filters and can support upto four digital microphone channels.
Inter DSP transfers can be done in miniDSP mode. PRB modes do not support inter DSP transfers. To mix i2s sources with microphone sources, microphone data has to be transferred from miniDSP_A to miniDSP_D in the PurePath process flow and then mixed together.
Would it be possible for you to share the complete audio signal flow diagram indicating the bus master/sample-rate on each of the i2s interfaces and the desired pin configurations? The configurations that you have envisioned appear possible (GPIO4 for digital mic input, ASI3 DOUT unused etc.). Please refer to Multifunction Terminal Register Configuration Table on page 115 for the required register settings. Do you have an evaluation module? We would recommend that you validate these settings on the evaluation module.
Best Regards.
Hello and thanks for your answers!
I am well aware that our 4 digital microphone requirement limits us to 3268.
So If I understand you correctly, if we run the circuit in DSP mode, we can transfer audio data freely between the mini DSP cores? and the limited transfer possibilities shown in Fig 108 are only for PRB mode?
I have made an updated version of the signal flow skis with added information about owner, sample rate and desired pin configurations.Host processor and peripheral 2 can work as either master or slave while peripheral 1 must be master.
While we are at the topic, how do we avoid clock drift between the three interfaces? might it be a good idea to let the bit clock of pheripheral 1 also act as the master clock, then set host and periph 2 as slaves?
BR
Joakim