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TAS5825M: BTL & PBTL configuration

Part Number: TAS5825M


Hi team,

I'm interested in using TAS5825M in BTL and PBTL. I'd like to design one board that can support both configurations with some simple hardware modifications (jumpers or similar). Here are my questions:

  • The TAS5825MEVM supports BTL and PBTL, according to the User Guide. It seems U2 is the device/circuit designated for PBTL evaluation, based on the increased PVDD capacitance. If I'm using the U2 circuit in BTL and want to change over to PBTL...
    • Do I bridge OUT3+/OUT4+ and OUT3-/OUT4- or do I bridge OUT3+/- and OUT4+/-?
    • Are there any other changes that would need to be made (in hardware), such as removing C26 and C31?
  • This U2 circuit also support BTL operation, correct? If so, I think I can use this circuit as a template for my design and implement Post-Filter PBTL--is that correct?

Thanks,

Brian