isolated I2S

Hi Vincenzo,

The datarate limit for ISO7640FM of 150Mbps means that it cannot capture both high and low half-cycles of a 98.304MHz clock, this would take a minimum datarate of ~200Mbps.

This isolator - as well as the ISO7740, which is a more reliable and robust device - can isolate a 49.152MHz clock signal line. Is this a digital or analog clock signal? Although both are acceptable to use on the ISO7x40 inputs, the output will be square-wave digital signals.

An appropriate way to isolate I2S is by using the isolator in between the I2S bus and devices, for example between an MCU with I2S transceiver and PCB input lines, or on a PCB between an I2S transmitter and output lines. I2S MCLK, SCLK, WS, SD_in and SD_out lines can be isolated given that they are logic-level signals (3.3V or 5V).

If you have a block diagram or schematic made, feel free to post it here or share it with me via PM for review. If you like, I can provide a diagram in my next response.


Thank you for posting to E2E!

Manuel Chavez