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TAS2560: What is the possible PDM CLK and PDM DATA frequency?

user5243711
Prodigy 40 points
Part Number: TAS2560
Other Parts Discussed in Thread: TLV320DAC3203

I want to use this HP-Amp in a low latency application. Therefore I'd like to apply a PDM signal to the Amp. But there is no frequency range mentioned in the datasheet.

What is the maximum PDM CLK freuency? (And the possible frequency range.)

What is the maximum PDM DATA freuency? (Is the mentioned 8 times lower frequency a must?)

What is the minimum latency? (Is there any additional latency?)

Kind Regards,

Daniel

  • 0
    TI__Guru** 109395 points

    Hi Daniel,

    Welcome to e2e.

    You mention "HP-Amp" but TAS2560 is a Class-D amplifier. Just wanted to clarify that TAS2560 is a mono speaker amplifier, and not a Headphone amplifier.

    PDM clock should be FS*8 for proper operation, so this is a must. The details in PDM timing is available Table 7.11 and Figure 6.
    Latency numbers are not provided for either PCM or PDM modes. Although I'll check if there is any information available.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators

  • 0 in reply to Ivan Salazar
    Prodigy 40 points

    Hi Ivan,

    Thanks for your welcome and fast response.

    I was not able to find a "true" HP-Amp with PDM input and SNR >105dB... If you have any suggestion please let me know!

    The PDM timing I recognized but there is no frequency range mentioned.

    Thanks & Best Regards,

    Daniel

  • 0 in reply to user5243711
    TI__Guru** 109395 points

    Hi Daniel,

    You can take a look at TLV320DAC3203, this device is a headphone amplifier with digital input. PDM is supported by this device, and if the PDMCLK is generated by the device the maximum frequency is 6.758MHz.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators

  • 0 in reply to Ivan Salazar
    Prodigy 40 points

    Hi Ivan,

    Thank you for the suggested headphone amp. Unfortunately the SNR is not good enough for my application.

    The maximum PDMCLK frequency would fit perfectly to my needs...

    In my case the PDMCLK frequency will be generated from the source, so I need to know what frequency the TAS2560 can accept (in PDMCLK input mode: SLAVE).

    Thanks & BR,

    Daniel

  • 0 in reply to user5243711
    TI__Guru** 109395 points

    Hi Daniel,

    The maximum input clock frequency for PLL is 20MHz. So PDMCLK should be below this value.
    However, PDMCLK should be 8*Fs. Max sampling rate is 96kHz, so PDMCLK would be up to 768kHz.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators

  • 0 in reply to Ivan Salazar
    Prodigy 40 points

    Many Thanks,

    Daniel