TLV320AIC23: no stereo output

Federico, 

Strange,   Can you try changing register 7 to 0x03?  

I've looked through your register configuration and everything looks correct to me. 

Can you get a scope capture of the WCLK, BCLK and DATA ?  Do a single capture with the trigger on WCLK. 

best regards,

-Steve Wilson

Hello Steve,

In the meanwhile I've changed the interface mode to: MSB LEFT ALIGNED. So now my configuration is

REGISTER ID                   REGISTER NAME                    VAL

0xF                                     RR                                                0x0
0x0                                     LLICVC                                        0x117
0x1                                     RLICVC                                       0x117
0x2                                     LCHVC                                        0x1F9
0x3                                     RCHVC                                       0x1F9
0x4                                     AAPC                                           0x12
0x5                                     DAPC                                           0x0
0x6                                     PDC                                             0x7
0x7                                     DAIF                                             0x1
0x8                                     SRC                                             0x1c
0x9                                     DIA                                               0x1

I'm feeding BCLK=MCLK=12.288 to TLV320AIC23.

Let's say that with DAIF register = 0x1 I can hear music A from speaker A.

• If I change DAIF to 0x11 I can hear music B from speaker A.
• If I change DAIF to 0x21 I can hear music A from speaker B.
• If I change DAIF to 0x31 I can hear music B from speaker A.

So I think that the data interface is working correctly but I don't know how why there is music only from one speaker at a time instead from both. One of the two is always "muted".


I will add timing specs of the interface as soon as I can !

thanks

F//

Hello guys

in attach timing waveforms of both LRCIN and DIN.
+ Left aligned MSB first.
+ bclk=mclk=12.288M
+ sample rate 96K
+ 16 bit data. I have 0 padded both L and R with 48 bit. (1/96K)/(1/12.288M)/2-16bit=48.

thanks.

F//

Federico, 

Just for the sake of testing, is it possible to change the bclk to 3.072MHz?

best regards,

-Steve Wilson

Hello Steve,

Are you suggesting to use MCLK=BCLK=3.072M or MCLK=12.288M and BCLK=3.072M ?

If I swap L and R before sending it to the TLV320AIC23 I can clearly hear the swapped audio tracks but again, one at a time and often from the same speaker.

thanks

F//

Hello Steve,

I can't try it now. But as far as I remember I had tried it already without any success. I also tried all the DAIF available modes with blck=mclk=122.88: left justified, right justified, dsp mode and i2c mode but I always get sound from only one speaker.
------------

"The behavior you're describing makes it sound like the first Data slot is being transferred but the second is being lost"

I don't think it could be the case anyway beacause if I set the LRP bit in register 0x7 (000111) to 0 I can hear track_1 from speaker_A, and if I set the LRP bit in register 0x7 (000111) to 1 I can hear track_2 from speaker_A.
Audio quality seems also pretty good.
------------

I'm currently using this evaluation board LINK. So I think that every connection is ok.
Considering also that if I set the LRPSWAP bit in register 0x7 (000111) to 0 I get sound from speaker_A and if I set the LRPSWAP bit in register 0x7 (000111) to 1 I get sound from speaker_B clear any doubt about the output chains.

What do you think ? I'm running out of options..

Thanks for helping !

F//

Hello,

I'm sorry for the late reply but we were closed. I agree with you, something isn't adding up.

I've tried also this setup:
1. Firmware load on FPGA
2. TLV320AIC23 programming trhough SPI with the previous mentioned configuration
3. Added the following pseudo while loop after the TLV320AIC23 programming

while(1){
    SPI_ACC_WRITE(SPI_ACC_REG_DAIF,0x1)
    usleep(2000000);
    SPI_ACC_WRITE(SPI_ACC_REG_DAIF,0x31);
    usleep(2000000);
}

Now I can clearly hear music A form speaker A and music B from speaker B. By the way I still can't hear both of them at the same time. arghhhhhh ! what am I missing ? I really do not know.

// My current programming routine
SPI_ACC_DATA0(SPI_ACC_REG_RR,0);
usleep(1000000);
SPI_ACC_WRITE(SPI_ACC_REG_LLICVC,     0x117);
SPI_ACC_WRITE(SPI_ACC_REG_RLICVC,    0x117);
SPI_ACC_WRITE(SPI_ACC_REG_LCHVC,     0x1F9);
SPI_ACC_WRITE(SPI_ACC_REG_RCHVC,    0x1F9);
SPI_ACC_WRITE(SPI_ACC_REG_AAPC,       0x12);
SPI_ACC_WRITE(SPI_ACC_REG_DAPC,       0x3);
SPI_ACC_WRITE(SPI_ACC_REG_PDC,         0x7);
SPI_ACC_WRITE(SPI_ACC_REG_DAIF,         0x1);
SPI_ACC_WRITE(SPI_ACC_REG_SRC,         0x1c);
SPI_ACC_WRITE(SPI_ACC_REG_DIA,           0x1);