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TLV320AIC3120: Controlling codec to sync data input and output data rates

Jacob Handy
Prodigy 120 points
Part Number: TLV320AIC3120


Hello,

I'm set up to receive I2S audio data from a TLV320AIC3120. Now I'm trying to closed loop control the codec to try and match the input data rate of the I2S to the output data rate of my USB stack. How can I adjust the codec to bring these data rates into sync. I'm concerned that the Data rate of the USB will vary with different computers. I played around with making small adjustments to the PLL J.D coefficient on the fly which kind of worked, but it looks like doing this is not recommended without shutting down the PLL (which I hadn't done with my small on the fly changes). What are my options for bringing these data rates into sync?

Thank you,

  • 0
    TI__Mastermind 30220 points

    Jacob, 

    When the data rate changes the codec should have the DACs/ADC shut down, then the PLL coefficients change, and then the ADC/DACs powered back up.

    The USB processor should have some kind of firmware that would handle this.  It would know when the data rates change.  If the MCLK from the USB processor remains the same,  there is no need to change the PLL coefficients,  only the Dividers.  which could simplify things a little bit.

    So a lot of what the AIC3120 does is going to depend on the capabilities of your USB processor.

    -Steve Wilson  

     

  • 0 in reply to Steve-Wilson
    Prodigy 120 points

    Steve,

    I'm not looking to change the data rate a large amount. My in and out data rate to my audio data buffer on the MCU is not perfectly in sync so I eventually get a buffer over or under run. I'm looking to only adjust the clock rates a small amount to bring the buffer into sync. I was hoping to modify the PLL D coefficient because I can make very small changes to the clock rates.

    In my experiments I've changed the D coefficient on the fly (in small steps) without shutting anything down and nothing appeared to break. Is this highly not recommended or are small changes to the D coefficient alright?

    Or Would adjusting the Master input clock be a better approach for the Codec? than changing the PLL coefficients?

    Or would I get better results skipping or padding samples?

    Thank you,

  • 0 in reply to Jacob Handy
    TI__Mastermind 30220 points

    Jacob, 

    Can you give me some more info?  This seems like a processor or software issue, that you are trying to solve with the codec...

    you can change the coefficients on the fly,  but I can't guarantee the functionality of the PLL when the coefficients are changed in this manner. 

    Is the MCU the Audio bus master?  is it also supplying the MCLK?

    best regards,

    -Steve Wilson

  • 0 in reply to Steve-Wilson
    TI__Mastermind 30220 points

    Hi Jacob, 

    I haven't heard back from you.  Are you still experiencing issues?

    best regards,

    -Steve Wilson