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Output Timing Synchronization with TLV320AIC codec

Roni Gotman
Prodigy 120 points

Hello

We are using TLV320AIC codec with c6748 DSP

The objectives are :
- Output an identical audio signal from two separated c6748 DSP boards (identical TDMA slot) such that the 
maximum shift between the two signals is 3 microseconds.

For testing  we are a buffer of a 3khz sine wave samples.

- MCLK is 80 Mhz and is synchronized in both boards.
- codecs sampling rate has been configured to 8 Khz.
- codecs I2C initialization is using the C6748 controller
- The FS in both boards have been synchronized with a maximum shift of 200 nanosec (no jittering) 
(We have verified this with scope). 
- The  data on the Tx TDM lines are almost completely superposed in both boards
(We have verified this with scope).

The analog signals shift at the codecs output are, however, at best 
about 4 microsec. 
Every reset+I2c setup of the codecs is causing a fluctuation in this shift. 
(10, 20 or 40 microseconds) although the FS and Tx TDM data are almost completely superposed
(up to 200 nanosec shift ).


Our questions :
1) Is the objective theoretically possible ? 
2) Are the audio output channels delays deterministic ?
2) If it is possible : What is the setup needed with respect to :
- I2C codecs initialization (order of initialization,values,timing, etc).
- clocks configuration (connecting the clocks before/after the I2C init etc).
- Any other idea.

 

  • 0
    TI__Mastermind 28585 points

    Our questions :
    1) Is the objective theoretically possible ? 

    The AIC series of CODECs were not designed with conversion synchronization capabilities between multiple CODECs. 

    2) Are the audio output channels delays deterministic ?

    If the PLL is not used, conversion will be derived from MCLK and a constant divider ratio. If MCLK is applied to all CODECs at the same time after all control commands have already been sent, the converters should be very close to synchronous. A newer CODEC such as the AIC3104 might be a better choice than the older voice band CODEC's.

    2) If it is possible : What is the setup needed with respect to :
    - I2C codecs initialization (order of initialization,values,timing, etc).

    Yes. Set up via the I2C should be done first. MCLK is not needed for the I2C bus to work. Each CODEC can be set up individually, then apply MCLK to all CODECs at the same time.


    - clocks configuration (connecting the clocks before/after the I2C init etc).


    - Any other idea.

    The AIC3104 would be better than the older voice band CODECs. You can set the AIC3104 up for 48 kHz sampling then use register 2 to reduce the output to 8kHz data rate. Since the internal conversions are happening at 48 kHz the jitter would be less than if Fs is set to directly to 8 kHz. In either case, it will be up to the designer to determine if the accuracy will meet their requirements.