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PCM1863: PCM1863: Mic Bias and VIN

cain.yen
Prodigy 80 points
Part Number: PCM1863

Hi,

We have applied PCM1863 in our design for mic input and found the voltage on Mic Bias pin was droping from 2.6V to 0 or sometimes just 0.  The VIN pins we used (1P&1M) were both 0 while the other unused VIN pins were 1.6V.  We have also replaced a few new ones and the problem remained. The configurations were set according to the datasheet and PurePath Console. PCM1863EVM with same configurations did not have this problem.

Q1: We wonder if the voltage level of VIN pins are pulled up internally and does the configuration of channels affect the voltage level of VINs?

Q2: What could possibly cause the voltage drop of Mic Bias except from the power up bit? Is it set to 2.6V only after power on?

The schamtic of the ADC part is given here:

 

sss

  • 0
    TI__Mastermind 30090 points

    Cain, 

    Q1- Yes, the bias is set internally.  Note that ALL unused inputs should be terminated with a 0.47uf Cap to GND. 

    Q2. - Is Micbias dropping?  or is it the DC bias on the input?

    I have a few questions for you. 

    1. Why are you configuring the inputs as a differential input, when your input is Single ended?

    2. I don't see the microphone on your schematic,  how are you terminating it? 

    3. read register 6.  What do you read?

    best regards,

    -steve Wilson

    best regards,

    -Steve Wilson

  • 0 in reply to Steve-Wilson
    Prodigy 80 points

    Hi Steve,

    The problem is that both Mic bias and Input DC bias are droping or 0, even if when they are floating. The other unused input pins are 1.6 (floating). We changed the channel configurations (register 6) many times and found that only the VIN pins we intended to use, will drop to 0 or a few milivolts.  

    We have found a possible reason that may cause the problem. After connecting the I2S clock source (SCKI, LRCK and BCK)  to PCM1863EVM,  the Mic and Input bias powered up, and if disconnecting BCK or LRCK, the two bias will imediately drop to 0. So it could be caused by the signal integrity problem of the clocks which changed the power mode to standby sometimes. Is this interpretation correct?

    Kind regards,

    Cain

  • 0 in reply to cain.yen
    TI__Mastermind 30090 points

    Cain, 

    hmm, it depends on how you have the device configured,  I wouldn't expect the bias to drop if there was still an SCLK,  but,  if you are in auto detect mode, and there is no L/R and BCLK the device will switch to standby. 

    best regards,

    -Steve Wilson