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TLV320AIC3110 help

Part Number: TLV320AIC3110
Other Parts Discussed in Thread: TEST

I am trying to run TLV320AIC3110 on my board with STM32F7 on board

In the debugger, I see that all the registers were successfully written to TLV320AIC3110 during initialization

Data is visible on the oscilloscope, but TLV320AIC3110 is silent


Here is my code:

void Application::Init() {

	BoardSupportPackage::Init();

	auto audio = TLV320AIC3110(Peripheral::hi2c1);
	audio.CodecReset();
	audio.SetFrequenciesSetting(48000);
	audio.ConfigureAudio();
	audio.ConfigureMic();
	audio.AudioVolumeControl(30);
	audio.CodecUnmute();
	audio.CodecMute();


    int16 signal[46876];
    int nsamples = sizeof(signal) / sizeof(signal[0]);

    int i = 0;
    while(i < nsamples) {
        double t = ((double)i / 2.0) / (double)nsamples;
        signal[i] = 32767 * sin(100.0 * (2.0 * 3.14159265358979323846) * t); // left
        signal[i + 1] = signal[i]; // right
        i += 2;
    }

    while(1) {
        auto res = HAL_SAI_Transmit(&Peripheral::hsai_BlockA2, (uint8*)signal, nsamples, HAL_MAX_DELAY);
        if(res != HAL_OK) {
            Peripheral::CriticalError();
        }
    }
}

STM32 SAI HAL:

	hsai_BlockA2.Instance = 					SAI2_Block_A;
	hsai_BlockA2.Init.Protocol = 				SAI_FREE_PROTOCOL;
	hsai_BlockA2.Init.AudioMode = 				SAI_MODEMASTER_TX;
	hsai_BlockA2.Init.DataSize = 				SAI_DATASIZE_16; // --
	hsai_BlockA2.Init.FirstBit = 				SAI_FIRSTBIT_MSB;
	hsai_BlockA2.Init.ClockStrobing = 			SAI_CLOCKSTROBING_FALLINGEDGE;
	hsai_BlockA2.Init.Synchro = 				SAI_ASYNCHRONOUS;
	hsai_BlockA2.Init.OutputDrive = 			SAI_OUTPUTDRIVE_ENABLE;
	hsai_BlockA2.Init.NoDivider =				SAI_MASTERDIVIDER_ENABLE;
	hsai_BlockA2.Init.FIFOThreshold = 			SAI_FIFOTHRESHOLD_1QF;
	hsai_BlockA2.Init.AudioFrequency = 			SAI_AUDIO_FREQUENCY_48K;
	hsai_BlockA2.Init.SynchroExt = 				SAI_SYNCEXT_DISABLE;
	hsai_BlockA2.Init.MonoStereoMode = 			SAI_STEREOMODE;
	hsai_BlockA2.Init.CompandingMode = 			SAI_NOCOMPANDING;
	hsai_BlockA2.Init.TriState = 				SAI_OUTPUT_NOTRELEASED;

	hsai_BlockA2.FrameInit.FrameLength = 		64; // --
	hsai_BlockA2.FrameInit.ActiveFrameLength = 	32;  // --
	hsai_BlockA2.FrameInit.FSDefinition = 		SAI_FS_CHANNEL_IDENTIFICATION; // --
	hsai_BlockA2.FrameInit.FSPolarity = 		SAI_FS_ACTIVE_LOW; // --
	hsai_BlockA2.FrameInit.FSOffset = 			SAI_FS_BEFOREFIRSTBIT; // --

	hsai_BlockA2.SlotInit.FirstBitOffset = 		0;
	hsai_BlockA2.SlotInit.SlotSize = 			SAI_SLOTSIZE_DATASIZE;
	hsai_BlockA2.SlotInit.SlotNumber = 			2;
	hsai_BlockA2.SlotInit.SlotActive = 			SAI_SLOTACTIVE_0 | SAI_SLOTACTIVE_1;

My scheme:

The library that I rewrote from the Linux driver:

hastebin.com/azigubikom.cpp

hastebin.com/etirorahib.cpp

  • Hello, 

    What are you trying to ultimately achieve with the codec? Are you just trying to bypass the mic input to the speaker outs? Some clarification on this would help.

    We don't offer driver support for our devices. With that being said, if you provide a register dump and oscilloscope shots, we will be glad to take a look and help you figure out the issue. 

    Looking at the schematic, you should terminate unused inputs to GND using a .47uF cap. I also don't see the I2C pull-up resistors so I assume they are elsewhere in your schematic. 

    Regards, 

    Aaron

  • I generate a sine in the "signal".
    I want to see it on the SPL / SPR outputs

    Page 0:

    reg[0]		0 	
    reg[1]		0 	
    reg[2]		1 	
    reg[3]		86 
    reg[4]		0 	
    reg[5]		17 	
    reg[6]		5 	
    reg[7]		4 
    reg[8]		176 
    reg[9]		0 	
    reg[10]		0 	
    reg[11]		4 	
    reg[12]		2 	
    reg[13]		0 	
    reg[14]		128 	
    reg[15]		128 	
    reg[16]		8 	
    reg[17]		0 	
    reg[18]		132 	
    reg[19]		132 	
    reg[20]		48 
    reg[21]		128 	
    reg[22]		4 	
    reg[23]		0 	
    reg[24]		0 	
    reg[25]		0 	
    reg[26]		1 	
    reg[27]		0 	
    reg[28]		0 	
    reg[29]		0 	
    reg[30]		1 	
    reg[31]		0 	
    reg[32]		0 	
    reg[33]		0 	
    reg[34]		0 	
    reg[35]		0 	
    reg[36]		192 
    reg[37]		136 	
    reg[38]		0 	
    reg[39]		0 	
    reg[40]		0 	
    reg[41]		0 	
    reg[42]		0 	
    reg[43]		0 	
    reg[44]		0 	
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    reg[51]		2 	
    reg[52]		50 
    reg[53]		18 	
    reg[54]		2 	
    reg[55]		2 	
    reg[56]		2 	
    reg[57]		17 	
    reg[58]		16 	
    reg[59]		0 	
    reg[60]		1 	
    reg[61]		4 	
    reg[62]		0 	
    reg[63]		214 
    reg[64]		12 	
    reg[65]		0 	
    reg[66]		0 	
    reg[67]		0 	
    reg[68]		111 
    reg[69]		56
    reg[70]		0 	
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    reg[74]		0 	
    reg[75]		238
    reg[76]		16 	
    reg[77]		216
    reg[78]		126 
    reg[79]		227 
    reg[80]		0 	
    reg[81]		128 	
    reg[82]		0 	
    reg[83]		24 	
    reg[84]		0 	
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    reg[86]		0 	
    reg[87]		0 	
    reg[88]		127 	
    reg[89]		0 	
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    reg[105]	0 	
    reg[106]	0 	
    reg[107]	0 	
    reg[108]	0 	
    reg[109]	0 	
    reg[110]	0 	
    reg[111]	0 	
    reg[112]	0 	
    reg[113]	0 	
    reg[114]	0 	
    reg[115]	0 	
    reg[116]	0 	
    reg[117]	0 	
    reg[118]	0 	
    reg[119]	0 	
    reg[120]	0 	
    reg[121]	0 	
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    Page 1:

    reg[0]		1 	
    reg[1]		0 	
    reg[2]		0 	
    reg[3]		0 	
    reg[4]		0 	
    reg[5]		0 	
    reg[6]		0 	
    reg[7]		0 	
    reg[8]		0 	
    reg[9]		0 	
    reg[10]		0 	
    reg[11]		0 	
    reg[12]		0 	
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    reg[14]		0 	
    reg[15]		0 	
    reg[16]		0 	
    reg[17]		0 	
    reg[18]		0 	
    reg[19]		0 	
    reg[20]		0 	
    reg[21]		0 	
    reg[22]		0 	
    reg[23]		0 	
    reg[24]		0 	
    reg[25]		0 	
    reg[26]		0 	
    reg[27]		0 	
    reg[28]		0 	
    reg[29]		0 	
    reg[30]		0 	
    reg[31]		4 	
    reg[32]		6 	
    reg[33]		62	
    reg[34]		0 	
    reg[35]		0 	
    reg[36]		127 	
    reg[37]		127 	
    reg[38]		127 	
    reg[39]		127 	
    reg[40]		2 	
    reg[41]		2 	
    reg[42]		0 	
    reg[43]		0 	
    reg[44]		32 
    reg[45]		134 	
    reg[46]		9 	
    reg[47]		0 	
    reg[48]		32 	
    reg[49]		64 
    reg[50]		0 	
    reg[51]		0 	
    reg[52]		0 	
    reg[53]		0 	
    reg[54]		0 	
    reg[55]		0 	
    reg[56]		0 	
    reg[57]		0 	
    reg[58]		0 	
    reg[59]		0 	
    reg[60]		0 	
    reg[61]		0 	
    reg[62]		0 	
    reg[63]		0 	
    reg[64]		0 	
    reg[65]		0 	
    reg[66]		0 	
    reg[67]		0 	
    reg[68]		0 	
    reg[69]		0 	
    reg[70]		0 	
    reg[71]		0 	
    reg[72]		0 	
    reg[73]		0 	
    reg[74]		0 	
    reg[75]		0 	
    reg[76]		0 	
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    reg[78]		0 	
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    reg[88]		0 	
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    reg[93]		0 	
    reg[94]		0 	
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    reg[100]	0 	
    reg[101]	0 	
    reg[102]	0 	
    reg[103]	0 	
    reg[104]	0 	
    reg[105]	0 	
    reg[106]	0 	
    reg[107]	0 	
    reg[108]	0 	
    reg[109]	0 	
    reg[110]	0 	
    reg[111]	0 	
    reg[112]	0 	
    reg[113]	0 	
    reg[114]	0 	
    reg[115]	0 	
    reg[116]	0 	
    reg[117]	0 	
    reg[118]	0 	
    reg[119]	0 	
    reg[120]	0 	
    reg[121]	0 	
    reg[122]	0 	
    reg[123]	0 	
    reg[124]	0 	
    reg[125]	0 	
    reg[126]	0 	
    reg[127]	0 	

  • Hello, 

    Thanks for the register dump.

    I see on Pg. 1, Reg. 35, the value is set to 0x00. This register should be 0x20 if you want to route input MIC1LP to SPLP and SPLM. The SPL Class-D driver is also muted. To un-mute the driver, write 0x04 to Register 42 on Pg. 1.

    Let me know if this helps. 

    Regards,

    Aaron

  • I did as you advised.
    But nothing has changed

  • Hello,

    Are you using the microphone input and wanting to bypass to the speaker outs or using a digital input?

    Regards,

    Aaron

  • Hello.

    I want to make a WIFI phone.

    It seems that the problem is also that I did not correctly configure the MCU peripheral.

    I do not understand what slots are and how many of them are in TLV320AIC3110.
    I don’t understand what the frame length and the active frame length are.
    And I do not understand where I can get these parameters in TLV320AIC3110.

  • Hello,

    Slots are a part of the TDM architecture. If you are not using TDM, I would not worry about this. 

    Frame length refers to the WCLK.

    A little more detail on what you are trying to do with the codec would help. For example, what paths are you wanting to use internally? Are you wanting to achieve analog in and analog out? Analog in and digital out? You mentioned above that you want to generate a sine signal at the input and see it at the output. This makes be believe that you want to bypass the DAC. Is this correct?

    Regards,

    Aaron

  • Hello.

    I would like to get:
    1) I2S -> SPL / SPR
    2) MIC1LP -> I2S

    I tried to generate a sine for the test (I2S -> SPL / SPR).