TLV320AIC3106: Issue related to master clock

satheesh kumar32

Part Number: TLV320AIC3106

I have a custom board based on AM571x with TLV320AIC3106 as audio codec.The reference is taken from AM5728-GP-EVM.

In our design sys_clk2 (OSC1 24.576MHz) -->clkout2 pin (24.576MHz) -> AIC3x MCLK

When I start doing aplay/arecord biclock =1.536MHz and frame clock = 48KHz

It is expected one and we get proper recording and playback.No kernel source modification only device tree modification.

But I want to operate audio codec at a rate 12.288MHz. For this I divide the sys_clk2 by 2 by register writing directly.

I verified the 12.288MHz clock at clockout2 pin.

When I start doing aplay/arecord bitclock =768KHz and frame clock = 24KHz.

I think If codec is master, bitclock and frame clock are generated by audio codec not McASP

So why bitclock/2 = 768KHz and frameclock/2= 24KHz.

Regards

Satheesh Kumar S

over 5 years ago

0 Aaron Estrada over 5 years ago

TI__Mastermind 22950 points

Hello Satheesh,

Can you confirm that register 8 is getting configured correctly? Bits D7 and D6 determine whether BCLK and WCLK are configured in master mode.

Regards,

Aaron

0 satheesh kumar32 over 5 years ago in reply to Aaron Estrada

Expert 1045 points

Hi Aaron

Thanks for your support

In Linux when driver is running how can I read the register value. can you suggest any debug tool for reading registers.

Regards

Satheesh Kumar S

0 Aaron Estrada over 5 years ago in reply to satheesh kumar32

TI__Mastermind 22950 points

Hello Satheesh,

Unfortunately, I am unfamiliar with the Linux drivers and we do not offer support for driver related issues. You may want to post this question in the processors forum since you are using the AM571x.

If you are able to provide a register dump, I would be glad to take a look and see how the device is getting configured.

Regards,

Aaron

0 satheesh kumar32 over 5 years ago in reply to Aaron Estrada

Expert 1045 points

Aaron

Thanks for your support

I have read the i2c register.

The register dump is depicted below.

Regards

Satheesh Kumar S

0 satheesh kumar32 over 5 years ago in reply to satheesh kumar32

Expert 1045 points

Hi Aaron

A gentle reminder

I have also fed 12.288MHz from external oscillator and no kernel modification still I am getting bitclock 768KHz and frame clock as 24KHz .Plz help

Regards

Satheesh Kumar S

0 Aaron Estrada over 5 years ago in reply to satheesh kumar32

TI__Mastermind 22950 points

Hello Satheesh,

Some things that I noticed:

1. Generally good practice to add a software reset when writing to the device. You can change register 1 to 0x80.

2. PLL is enabled but the MCLK is not getting routed through the PLL. Was the intention to use the PLL?

3. If not using the PLL, disable it and set Q = 2 to get Fs(ref) = 48kHz.

4. In register 9, Bit D3 is set to 0 which tells the codec to only generate the number of BCLKs needed. You can change that bit to 1 which will give 256 BCLKs per frame.

Regards,

Aaron

0 satheesh kumar32 over 5 years ago in reply to Aaron Estrada

Expert 1045 points

Hi Aaron

Thank for your support

Actually I want to operate the codec at 8,16,32,48KHz. Since we select MCLK as 12.288MHz ,we don't want to enable pll.But how can I disable it in Linux environment

Regards

Satheesh Kumar

0 satheesh kumar32 over 5 years ago in reply to satheesh kumar32

Expert 1045 points

Hi Aaron

A gentle reminder

Regards

Satheesh Kumar S

0 Aaron Estrada over 5 years ago in reply to satheesh kumar32

TI__Mastermind 22950 points

Hi Satheesh,

To disable the PLL, and set Q = 2, you need to write 0x10 to register 3.

Regards,

Aaron

0 satheesh kumar32 over 5 years ago in reply to Aaron Estrada

Expert 1045 points

Hi Aaron

Thanks for your support

Ok I understood

You mean modify the driver source(tlv320aic31xx.c) . Or modification in some other place?. One more query From where codec source code gets sysclk (system clock) value.

Regards

Satheesh Kumar

0 satheesh kumar32 over 5 years ago in reply to satheesh kumar32

Expert 1045 points

Hi Aaron

A gentle reminder

Regards

Satheesh Kumar

0 Aaron Estrada over 5 years ago in reply to satheesh kumar32

TI__Mastermind 22950 points

Hi Satheesh,

It should be the driver source.

Regards,

Aaron

0 satheesh kumar32 over 5 years ago in reply to satheesh kumar32

Expert 1045 points

Hi Aaron

Thanks lot

which file needs modification.you mean tlv320aic3xx.c or else

if yes Which part of the driver code needs modification.

Regards

Satheesh Kumar S

0 Aaron Estrada over 5 years ago in reply to satheesh kumar32

TI__Mastermind 22950 points

Hello Satheesh,

I would expect you would know where the device gets configured. Again, I am unfamiliar with the device drivers and do not know exactly how your system is set up.

Regards,

Aaron

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TLV320AIC3106: Issue related to master clock