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TLV320ADC6140: Is it synchronized for parallel operation?

Needhu Gunasegaran
Intellectual 2900 points

Part Number: TLV320ADC6140

Hello Team,

My customer has the following question. Could you please help me out here. 

I have a question concerning the ADC tlv320adc6140. At the moment we have a major problem with an Analog Devices ADC ADAU1978. This is also a 4 channel I2S ADC. The problem is that when we us two of these in parallel they are not synchronous. It seems as if the start of conversion or the start of the decimation filter is not synchronized to the sample sync frequency.

The question is if the tlv320adc6140 when using two of them is synchronous. According to “Multiple TLV320ADCx140 Devices With a Shared TDM and I2C Bus application report” (SBAA383.pdf) I would assume that this is possible. Do you know if they are synchronous by only supplying The I2C and the I2S interface to the TLV320ADCx140?

 

I do have some extra questions as follows,

  • Do we have any test report done in this direction?
  • Is this the best Quad Channel Audio ADC to do the above function or do we have any other device in the portfolio that could work better? 

Thank you in advance.

Best Regards,

Needhu

  • 0
    TI__Mastermind 23050 points

    Hi Needhu,

    I don't think we have a test report on the synchronization feature but this has been thoroughly verified. SBAA383 discusses the details of sharing the I2C and I2S buses.

    This is the newest technology in our portfolio and is certainly the easiest to use to implement this function. Whether it is the best for this application depends on what exactly the customer requirements are. There are certainly other devices that can support parallel operation of 8-channels so it depends on what the other features or key specs of the system are.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    Prodigy 30 points

    Hi Zak,

    I am the customer with this synchronisation question :-)
    The synchronisation of two TLV320ADC6140 sharing the same TDM interface seems to work pretty well.
    As long as we switch off and on again the ADC with the help of SLEEP_ENZ in Register 0x02 (after setting everything up via I2C) the ADCs are synchronised (it is not possible for us to set everything up and apply the FSYNC and BCLK at last as it is mentioned in the datasheet).

    Now I do have another question:
    The two different Evalboards with the TLV320ADC6140 that we are using are supplied with the same sinewave of 1kHz and with the same amplitude of 1V (from a common source). The phase is perfect and sychronised, but the amplitude is more than 0.6dB different between the two ADCs. Is the gain matching and the amplitude accuracy really that bad? Can you give us a value how well the different ICs are matched regarding the amplitude accuracy?
    Attached you find a reading of two different ADCs with the same signal applied.

    Best regards

    Christian Schmedt

  • 0 in reply to Christian Schmedt
    TI__Mastermind 23050 points

    Hi Christian,

    We don't specify the gain error from device to device, only between channels on a given device, which is typically within 0.1dB. I don't think 0.6dB from different ICs is unreasonable to see though. The full scale input range of the device is also a typical and this can vary a bit as well. The device does provide a gain calibration feature to allow you to tune individual channels if you need to account for this. I hope this helps! 

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Mastermind 23050 points

    Hey Christian,

    I spoke with our designers about the gain error and just wanted to update you. In older revisions of silicon that you will find on EVMs or in the sample store at the moment the gain error was not trimmed as finely and you can see up to 1dB of gain error. However, on the latest silicon that you would receive for a production build, that gain error is actually trimmed to be ~0.1dB so the matching will be much better between channels as well as between ICs. Future EVM builds and sample stock up will also use the newer silicon. I hope this eases your concerns!

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Intellectual 2900 points

    Hi Zak,

    Thanks for your support so far and for updating us.

    I was concerned about this huge variation as well. Do you have an update on when the EVMs and sample ICs will be updated to the new revision version?

    I will take this topic offline for some additional questions.

    Thanks,

    Needhu