Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

  • State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 249 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCM1789-Q1: System clock selection

NOBUO FUJIHARA
Expert 8685 points
Part Number: PCM1789-Q1

Hi team,

Customer asked how to select system clock frequency.

- 16bit inpu data

- Sampling rate = 48kHz

Q.1) According to Table 3, it looks the higher system clock frequency, the better noise-free shaped bandwidth. Is Drawback the higher power consumption?

Q.2) When fs =48kHz, fsx512, fsx768, fsx1152 are all in same column. Is there no merit to select higher system clock than fsx512 if sampling rate = 48kHz?

Best regards,

  • 0
    TI__Guru 53433 points

    Hi Fujihara-san,

    1. You are correct, the drawback is higher power consumption.  In addition, there can be difficulty in routing the PCB layout with very high-frequency signals.

    2. There is no benefit to using a higher clock than the 512×fs with fS=48.  The performance with the Filter OSR =8x and modulator OSR = x128.

    Thanks,

    Paul