HI team,
In PCM1864 datasheet mentions "While the device is not transmitting data (but still being clocked), the DOUT pin will be Hi-Z (high impedance) to
allow other devices on the bus to transmit their data." Is this for both master and slave mode? If configured in slave mode, does it mean if slave device not receiving any LRCK but still receive BCLK, Dout pin will be HI-Z?
My customer test on the PCM1864 and found when they're not recording, BCLK still there but no LRCK present, and they test the DOUT waveform as below picture shows with the same frequency as LRCK, is it correct? How to understand this waveform?
Thanks