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TAS5782MEVM: The gain of TAS5782 is 6db lower than the actual setting. For example, when we set it to 0db, it was actually measured to be -6db. We also tested it with TAS5782MEVM.Where will the PWM frequency and gain be affected?

2018
Expert 2630 points
Part Number: TAS5782MEVM
Other Parts Discussed in Thread: TAS5782M

The gain of TAS5782 is 6db lower than the actual setting. For example, when we set it to 0db, it was actually measured to be -6db. We also tested it with TAS5782MEVM.Where will the PWM frequency and gain be affected?

  • 0
    Expert 2630 points

    The gain of TAS5782 is 6db lower than the actual setting. For example, when we set it to 0db, it was actually measured to be -6db. We also tested it with TAS5782MEVM.Where will the PWM frequency and gain be affected?

  • 0 in reply to 2018
    TI__Genius 9995 points

    Hello customer,

    It is suggested to do experiments on EVM with GUI. Then check:

    1. Volume
    2. DRC/AGL threshold = -6dB?
    3. clipper?
    4. DAC gain?
    5. Analog DAC Gain 2Vrms?
    6. Board: SPK_GAIN =26dB or 20dB? See table 14 in the datasheet.

    If every gain is ok, it should not be -6dB lower. Please try to input -30dBFS and 0dBFS for check.

    Regards,

    Alix Wan.

  • 0 in reply to Alix Wan
    Expert 2630 points
    At present, my volume input and output are in 0db, and DRC is in the off state.
    DAC gain = 0;Analog DAC Gain 2Vrms;Board: SPK_GAIN = 26 db;Meanwhile, the voltage of SPK_GAIN foot was monitored at 5.7v.
    At present, we are initializing TAS5782M, sometimes the PWM frequency is 768K (at this time, the power is normal), sometimes the output frequency of the abnormal PWM is 384K, the power is 6db less,
    I would like to ask what causes the instability of the amplifier, can the software correct this problem?thanks
  • 0 in reply to 2018
    TI__Genius 9995 points

    Hello customer,

    For TAS5782 itself, if your configuration of Fsw=768K and gain =26dB, it won't change except SPK_GAIN in table 14 is affected by external circuit. Hence, may you:

    1. I doubt that voltage on Gain/Fsw setting is affected by external circuit during the power on process. Please see more details in 9.3.6 in datasheet
    2. As gain/fsw detection is determined during the startup, hence, i would recommend you to scope the voltage waveforms below during the power on process:
    1. PVDD
    2. GVDD_REG
    3. SPK_GAIN/FSW
    • If you have a EVM in your hand, check the resistor setting, i cannot reproduce this issue in EVM now. If you can reproduce it in EVM, let's sync up and debug together further.

    Please do a comparison when output power is normal vs abnormal. Thanks!

    Regards,

    Alix Wan.