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DIX4192: optimize jitter

Amy Luo
Expert 6895 points

Part Number: DIX4192
Other Parts Discussed in Thread: SRC4392, PCM9211

Hi team,

Now, the jitter output from the master control is 50ns. The slave jitter is 2ns. Is it feasible for customers to add DIX4192 or SRC4392 between master and slave to optimize jitter?

Best Regards,
Amy

  • 0
    TI__Mastermind 23050 points

    Hi Amy,

    If I understand this correctly you have a master device generating I2S clocks with a jitter of 50ns and a slave device that only has a jitter tolerance of 2ns so you effectively need a jitter cleaner for the audio clocks? I believe you could do this with a DIX4192 using PortA for the input data, routing through the DIT output, then back to the DIR input, and finally output the data on PortB. PCM9211 mentions this use case in section 8.3.8.7.3 of the datasheet and the two devices share a very similar DIR architecture.

    Best,

    Zak