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PCM9211: Low power/shutdown operation with ADC level detect

Barabas Raffai
Prodigy 30 points
Part Number: PCM9211


Hi,

I have found that setting the RST pin low causes the power to be 110 mW lower
compared to when register 40h is set to power down everything except ADC and
OSC (D2h).

Shutting down everything using reg 40h uses 70mW more than a full reset using
the RTS pin.

Is there any way to reduce the power further without leaving the PCM9211 in
reset?  The design requires that the ADC is powered for level detection.

Any help would be appreciated.

Thanks,
Barabas

  • 0
    TI__Mastermind 23050 points

    Hi Barabas,

    I'll preface this by first saying that PCM9211 was designed primarily for AV receivers, soundbars, etc. and was not really optimized for low-power applications. 

    If you are leaving the oscillator on you could try changing the OSCAUTO bit to 1 in register 24 so that it is only active when the DIR locks and CLKST is active.

    Running at slower clock speeds may also slightly decrease power consumption a bit if you are not relying on the DIR.

    You could also try making sure all of the MPIO pins are set to HiZ.

    Best,

    Zak