Hi team,
The datasheet of PCM1754 said the BCK/LRCK should be synchronous to the SCK, TI recommendeds that the LRCK and BCK pins be derived from the system clock input SCK.
customer application is that SCK generate from 11.2896MHz crystal oscillator, fs=44.1KHz, BCK=2*fs*sample bit =64*fs. Currently, the BCK is generate from MCU.
if the BCK come from SCK, the BCK will be 256*fs. Is that Ok? In the D/S the BCK can operated at 32,48,64 times of sampling frequency, I'm not sure the 256 is ok or not.
if not, how to set the BCK/LRCK to make sure it synchronous to SCK ? Does it need a frequency divider?
thanks.