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PCM1754: relationship between BCK and SCK

Part Number: PCM1754

Hi team,

The datasheet of PCM1754 said the BCK/LRCK should be synchronous to the SCK, TI recommendeds that the LRCK and BCK pins be derived from the system clock input SCK.

customer application is that SCK generate from 11.2896MHz crystal oscillator, fs=44.1KHz, BCK=2*fs*sample bit =64*fs. Currently, the BCK is generate from MCU.

if the BCK come from SCK, the BCK will be 256*fs. Is that Ok? In the D/S the BCK can operated at 32,48,64 times of sampling frequency, I'm not sure the 256 is ok or not.

if not, how to set the BCK/LRCK to make sure it synchronous to SCK ? Does it need a frequency divider?

thanks.

  • Hi Betty,

    The ideal implementation would use the same external crystal as the reference clock for the MCU itself.  This is to prevent synchronization errors between the SCK and LRCK/BCK.  

    Using an external SCK=BCK while LRCK and DIN come from an MCU with a different clock reference, will not resolve this issue, as the LRCK/DIN might be out of sync with the SCK/BCK clocks.

    They should evaluate if they can generate a new SCK signal with the MCU itself, so that all of the clock signals are derived from the same master clock signal.

    Thanks,

    Paul