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SRC4382: Phase Difference amongst TX output pins

Phyllis Barron
Prodigy 30 points
Part Number: SRC4382

I have 8 instances of the SRC4382.

The measured phase difference of the TX output pins (at the XLR end) between the 8 instances is mostly zero which is what I expect as the MCLK, LRCLK and BCK is the same for the 8 ICs. And the register setting is the same for all 8 ICs. However, sometimes, if I unplug one of the outputs, and re-plug, I get a phase difference of 75 degrees. What is the cause of this unexpected phase difference?

FYI, we are comparing the XLR outputs using a phase scope.

Thanks,

  • 0
    TI__Mastermind 23050 points

    Hi Phyllis,

    Welcome to the forum! Could you please describe the test you are running in a bit more detail? Are you disconnecting the connection from your scope to the DIT output, or disconnecting the I2S input from the SRC port? Does the data you see still match what you expect just with the phase being different? Are you connecting directly to the TX+ pins or do you have other components such as a transformer between the TX+ and your measurement point?

    Any data you can share is also helpful!

    Best,

    Zak

  • 0 in reply to Zak Kaye
    Prodigy 30 points

    Hi Zak,

    Thanks a lot for getting back to me.

    I am connecting the TX pins to the XLR via a transformer as is advised in the application note.  There is a 110 ohm resistor  connected to the TXP pin and a 100nF capacitor connected to the TXN pin prior to the transformer. The output is the DIT output. The data is correct but the phase is different. As I mentioned, the phase difference is seen when I disconnect the XLR output but this is seen once in about 5 - 10 unplugs.

    Thanks.

  • 0 in reply to Phyllis Barron
    TI__Mastermind 23050 points

    Hi Phyllis,

    I can't think of a reason why the phase of the output pin on the SRC would change irregularly by disconnecting the XLR cable. Changing the loading on the output has no effect on the DIT operation unless you are overloading it. Unless you are changing something about the input or the reference clock shifts and the device has to re-lock, I don't see why this would occur. Perhaps on the receiver end if you catch it in the middle of a transmission and the status bits and other non-audio data fall in the wrong place it takes some additional cycles to lock and properly interpret the data and this manifests as an apparent delay for that channel? 

    Does this happen for any given channel on all of the devices, or is it specific to 1 device?

    Best,

    Zak

  • 0 in reply to Zak Kaye
    Prodigy 30 points

    Hi Zak,

    Apologies for not getting back to you earlier. I have been trying to understand the issue better. I noticed that the 75 degrees is equals to a sample lost as the signal is a10K sine wave. I am going back to the drawing board and checking that all the clocks feeding the SRC4382 are good.

    I will get back to you asap.

    Thanks.