Other Parts Discussed in Thread: TAS5756M,
Team,
There is usually some margin between AbsMax and Maximum recommended voltages provided in TI data sheets to account for supply variation. For instance, the max recommended PVDD voltage on TAS5756M is 24VDC and the AbsMax level is 26.4VDC to allow 10% variation on the supply with no issue. The TAS2770 had 18VDC for the VBAT in pre-release versions of the data sheet, then changed to 16VDC at Revision B of the data sheet. As of Revision C of the data sheet (released in October), it seems to be changed back to 18VDC.
We've designed this component into a few projects for our clients and one of them would now like to use it with PVDD at 18VDC on a new project. They mentioned that it seems odd to use the device at 18V if exceeding this voltage by even 0.001% could cause damage to the device. The quality group at this client is concerned that 18VDC is not truly supported because there is no margin between the recommended voltage and absolute maximum voltage. It does seem odd that the data sheet seems to indicate that the device could be physically damaged at the same voltage as the maximum recommended voltage (i.e. 18VDC).
Is there margin beyond the 18VDC recommended level? If so, are there plans to adjust the AbsMax spec to something like 19.8 to provide 10% on the maximum recommended voltage?
Thanks for the help!
Cody
