Part Number: SRC4190
Other Parts Discussed in Thread: SRC4192
Hi
Can SRC4190 input support 16 bits I2S @ 32fs ?
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Hi PYTsai,
I believe I misspoke actually. True 16-bit operation is only supported in right-justified formatting. I2S requires a BCLK delay between the FSYNC edge and data transmission so with 16-bit data, a 32 BCLK is not sufficient to fit all the data and this BCLK delay.
Please review the datasheet for input and output port operation. The output port can be set to 16-bit mode but you still need at least 48*fs for this case unless right justified formatting is used.
Best,
Zak
Hey PYTsai,
The SRC can only support 16bit I2S if you are still providing at least 48*fs BCLK. This is because the device can only be configured with a 24-bit slot length with I2S so you can pad unused bits with 0s, but you have to supply at least 48*fs still. 32*fs is only supported in right justified 16-bit mode for both devices.
16-bit I2S at 32*fs would be possible if we had a way to change the slot length of the SRC, but it is fixed at 24-bit in I2S mode.
Best,
Zak