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TAS5548: 24.576MHz MCLK In Support

Adam Lock
Intellectual 255 points
Part Number: TAS5548
Other Parts Discussed in Thread: TAS5558

Hello,

My system is running off of a 24.576MCLK. The TAS5548 states that  a multitude of MCLK values are supported, but the pin description for XTALI indicates that a 12.288MHz clock should be connected. The block diagram (Figure 13) also shows the MCLK at 12.288MHz. However, on page 26 of the datasheet it indicates that the MCLK can support a wide range of frequencies.

Page 26 of datasheet: "The device will accept 32, 44.1, 48, 88.2, 96, 176.4 and 192 kHz serial data in 16, 20 or 24-bit data in Left, Right and I2S serial data formats using a 64 Fs SCLK clock and a 64, 128, 192, 256, 384, or 512 * Fs MCLK rates (up to a maximum of 50 MHz)."

My questions are:

1. Is a 1.8V MCLK input to XTALI supported?

2. Are there any changes to the PLL filters that need to be considered? I see no PLL filter tuning recommendations and want to be sure that doubling the expected clock frequency will not affect the PLL tuning.

- Adam

  • 0
    TI__Mastermind 19880 points

    Hi Adam,

    TAS5548 can not support 1.8V power region.

    PLL filter can not be added if no clock fault is triggered.

    Regards,

    Derek

  • 0 in reply to Yanming Gong
    Intellectual 255 points

    Derek,

    On page 4 of the TAS5548 the data sheet calls out a voltage of 1.8V in a column labeled 5V tolerant. I have highlighted this in the attached screen shot. I may be reading this incorrectly but it appears that this is directly indicating that this one particular I/O on the IC is a 1.8V I/O.

    However, I still have the question of whether or not 24.576MHz is a supported MCLK input frequency? This would be a 24.576MHz clock output from my SoC to the TAS5548 XTALI pin.

    I am not sure what you mean by the "PLL filter can not be added if no clock fault is triggered." Can you please explain what you mean here?

    Best,

    Adam

  • 0 in reply to Yanming Gong
    Intellectual 255 points

    Derek,

    On page 4 of the TAS5548 the data sheet calls out a voltage of 1.8V in a column labeled 5V tolerant. I have highlighted this in the attached screen shot. I may be reading this incorrectly but it appears that this is directly indicating that this one particular I/O on the IC is a 1.8V I/O.

    However, I still have the question of whether or not 24.576MHz is a supported MCLK input frequency? This would be a 24.576MHz clock output from my SoC to the TAS5548 XTALI pin.

    I am not sure what you mean by the "PLL filter can not be added if no clock fault is triggered." Can you please explain what you mean here?

    Best,

    Adam

  • 0 in reply to Adam Lock
    TI__Mastermind 19080 points

    Hi Adam,

    1. Looks like you are planning to feed a MCLK to the device, right? TAS5548 supports crystal oscillator only but not external MCLK. You will need TAS5558 to work with external MCLK, and the logic level is 3.3V. 

    TAS5548/58 are the same device with only clock input configuration difference.

    2. 24.576MHz MCLK is good to use.

    Regards,

    Sam