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TLV320AIC1110: Slave mode settings

Part Number: TLV320AIC1110
Other Parts Discussed in Thread: TLV320AIC1103

Hello team,

My customer has a I2C interface problem with TLV320AIC1110.

During their test using the EVM, ACK does not return proper through I2C interface. All ACK are '1' while it should be '0'.

Therefore, they would like to ask some questions about P30 of the data sheet.

(1) It is written that when "CE" is high, slave operation is performed. However, there is no description corresponding to "CE" in the data sheet. What is CE and how do you set it?
(2) When setting the device selection address to Slave Address (A6-0), should it be left-justified?

Write mode: 1110001+R/W(0)+ACk _ Register Adr+ACK _ Data+ACK
Read mode: 1110001+R/W(0)+ACk _ Register Adr+ACK _ Data+ACK+1110001+R/W(1)+ACk+ReadData+ACK(Master)

I'm looking forward for hearing from you.

Best Regards,
Ryotaro Fukui

  • Hi Fukui-san,

    The may be a typo in the AIC1110 datasheet, we'll look into that. 

    Are you able to get any audio from the TLV320AIC1110 after power up?  It should come up with a default configuration that allows data to be sent and recieved through the PCM interface.  Also - the datasheet recommends pulsing RESET after power up to ensure you are in an operational state (see top of page 6, power on/reset).  That might be your ACK issue.

  • Hi Hendrick-san,

    Thank you for your reply. The previous I2C problem was able to work properly with phase adjustment.
    However, the audio signal has not been played yet.
    The customer uses MCLK (128KHz), and wants you to check the frequency description in datasheet of PCMCLK.

    • P.17 states 781.25ns (1.28MHz) for 128kHz CLK.
    • P.35 has a PCM CLK rate of 128kHz.

    * They designed it at 1.28MHz according to P17, but the audio signal cannot be played. Which description is correct? MHz or kHz?
    Just in case, MCLK is stated as 128MHz on P33. Is this a mistake of 128kHz?

    Best Regards,

    Ryotaro Fukui

  • Hi Fukui-san,

    The TLV320AIC1110 needs both MCLK and PCMCLK, they can be 2.048MHz or 128kHz.  You also need PCMSYN applied to the device in order to play an audio signal.  We will look into making the necessary corrections in the datasheet.

  • Hi Hendrick-san,

    They modified PCMCLK to 128kHz, but the signal is still not passing.

    I will attach this test configuration and PCM side waveform, so could you please check if there are any mistakes in the test conditions?

    The test is configured to simply pass the test signal 1kHz with the μ-law (8bit) setting.

    Regards,

    Ryotaro FukuiTLV320AIC1110_SlaveModeSettings.pptx

  • Hi Hendrick-san,

    How is the progress of the circuit check? Please let me know if you have any other necessary information.

    The customer is also trying to experiment with the TLV320AIC1103 / 1110EVM-K, but is having trouble finding the USB driver.
    Where can I get the USB-MODEVM driver? It seems that Windows XP compatible version is okay.

    Regards,

    Ryotaro Fukui

  • Hi Fukui-san,

    Sorry for the delay - I will review your PPT today.  The USB-MODEVM driver should be included with the software installation.

  • Hi Hendrick-san,

    Thank you for your prompt response. It seems that the design deadline is approaching for our customers, and it would be greatly appreciated if you could get it by the end of today.

    Also, thank you for the information about the driver. I would also like to report to the customer as well.

    Regards,

    Ryotaro Fukui

  • Hi Fukui,

    In order to get the same setup you describe in the PPT you sent over, I will have to schedule some lab time.  I have it running in the default power up state and it seems to work fine with a 2.048MHz clock and 8k sample rate, but does not like the 256kHz clock.  It will be tomorrow afternoon before I ca get into the lab to see what happens with your configuration setup.

  • Hi Hendrick-san,

    Thank you for your early feedback. I understand that the results will be tomorrow at the earliest. I would like to continue providing customers with progress reports.

    Regards,

    Ryotaro Fukui

  • OK - will give you another update tomorrow.

  • Hi Fukui,

    I was able to write the same commands via I2C to the TLV320AIC1110 and I get the expected output from the device.  I am using the AIC1110EVM and simply tie PCMO to PCMI.  The main difference in our setups is in the FPGA path.  Can you try jumping PCMO directly to PCMI and see if you get sound through EAR20?

  • Hi Tom,

    Thank you for the test results. I was relieved to hear that the signal connection succeeded.

    So they can solve the signal error just by connecting PCMI and PCMO? Is it okay to connect the input / output pins?

    As for additional information, the customer has confirmed that the signal could be passed by setting each clock to MCLK = 2.048MHz and PCMCLK = 500KHz and converting the audio to PCM linear.

    There is a description of MCLK = PCMCLK in the data sheet, and I think that the clock is the same setting in your test as well. but is MCLK = PCMCLK correct? Could the clock be also involved in this issue?

    Best Regards,

    Ryotaro Fukui

  • Hi Fukui,

    There is no issue looping PCMO to PCMI.  If they are doing any addition processing on the data, they would need to do that off chip before returning the stream to PCMI pin.  In my tests, MCLK = PCMCLK.  In the power on default mode, the 256kHz was not working until writing to the AUX register and setting bit 0.

  • Hi Tom,

    I'm glad a solution to the error could be found out. I will recommend PCMI / PCMO connection to the customer. It was very helpful to have an immediate response, including testing in the lab. Thank you for your continued support.

    Best Regards,

    Ryotaro Fukui