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PCM1840: In TDM mode BCLK is inverted w.r.t to most other multi-channel audio ADCs

Part Number: PCM1840
Other Parts Discussed in Thread: PCM4204, TLV320ADC6140

Hi there,

I'm using the PCM1840 and have just discovered the following:

In TDM mode, audio data is clocked out on the rising edge of BCLK.

This is unlike any other multi-channel audio ADC that I have used in the past (Cirrus, AKM etc).  All clock audio data out on the fall-edge of BCLK. 

Even TI's 4 channel PCM4204 clocks data on the falling edge.

TI - do you have any comments on why this part was designed this way?.

thanks

  • Hi Stephen,

    Unlike I2S, there is not really a standardized format for TDM and we have seen a number of formats are commonly used. On our SW controlled devices in this family (TLV320ADC6140) we do provide full configurability of the ASI bus for whatever device you may interface with, but this is a fixed format for HW controlled devices. I'm not sure if there is a particular reason the rising edge was used as opposed to the falling edge so I will double check, but generally this should be configurable by the processor anyways.

    Best,

    Zak