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tlv320aic3106 reading issue

Mohsin
Intellectual 800 points

Other Parts Discussed in Thread: TLV320AIC3106

Hi All,

           I am using tlv320aic3106 with IIC interface. When I try to read the registers I am getting the contents of the next higher register (i.e. When I try to read Page 0 register 2 I am getting the contents of Page 0 register 3). While writing to a register it works fine but the issue is only in reading.

I am using the same IIC driver for interfacing with other IIC devices like IO expander etc and it works fine.

Can anyone let me know if they have noticed this behaviour ?

Regards,

Mohsin

  • 0
    TI__Mastermind 46195 points

    Hello Mohsin,

    Whenever a register read is done, a write is performed first by the host to set the register offset and then to read its data. It might be possible that you are reading an extra byte, in which our device will auto-increment, replacing the contents of the buffer in the MCU. It also might be possible that the IO expander, etc. do not have the auto-increment feature. I would suggest verifying that the protocol matches Figure 18 of http://focus.ti.com/lit/ds/symlink/tlv320aic3106.pdf.

    From p. 23 of the datasheet:

    "Similarly, in the case of an I2C register read, after the device has sent out the 8-bit data from the addressed register, if the master issues an ACKNOWLEDGE, the slave takes over control of SDA bus and transmit for the next 8 clocks the data of the next incremental register."

    Regards,

    J-

     

  • 0 in reply to J-
    Intellectual 800 points

    Hi Arbona,

     

            Thanks for your reply. Yes, I did look into the data sheet but I am not reading any extra byte. I have attached the screen shot of the clock and the data line when I am reading the register 0x03.

    Codec Address: 0x30 (read) and 0x31(write) (Just writing here in 8 bit format to make things clear)

    Register Address: 0x03

    Data at address location 0x03 = 0x91

    Data at address location 0x04 = 0x18

     

    So you can verify from the figure that I am sending/getting

    00110000(ACK)00000011(ACK)(START)00110001(ACK)00011000(NOACK)(STOP)

     

    Therefore I am reading 0x18 which is the data at address location 0x04.

    It does similarly for all the addresses and I have verified that the data is correct as the codec works as it should. And also I always read one register at a time and I have verified that I am not sending additional clocks.

     

     

    Regards,

    Mohsin

  • 0 in reply to Mohsin
    Intellectual 800 points

    Hi Arbona,

                      Can you please verify the above behaviour ?

    Regards,

    Mohsin

  • 0 in reply to Mohsin
    TI__Mastermind 46195 points

    Hello Mohsin,

    Reading register 3 is supposed to return the value of register 3. I double checked this just in case with EVM.

    Could you please verify the register write as well?

    For a write to register 3, data 0x91, it should look like:

    (S)(0011 0000)(ACK)(0000 0011)(ACK)(1001 0001)(ACK)(P)

    For a read from register 3, it should return 0x91 and look like this:

    (S)(0011 0000)(ACK)(0000 0011)(ACK)(Sr)(0011 0001)(ACK)(1001 0001)(NAK)(P)

    Regards,

    J-

  • 0 in reply to J-
    Intellectual 800 points

     

    Hi Arbona,

                        I have attached the images for writing and reading and we can clearly see that we are writing correctly and while reading we are getting different value. Can you please inviestigate this by using the same codec address or please advise me some test to do.

     

    Writing 0x91 at address 0x03 and you can see from the figure it matches

    (S)(0011 0000)(ACK)(0000 0011)(ACK)(1001 0001)(ACK)(P)

     

     

    Reading from address 0x03 returns 0x18 which is the data at address location 0x04.

    (S)00110000(ACK)00000011(ACK)(START)00110001(ACK)00011000(NOACK)(STOP)

     

     

    Regards,

    Mohsin

  • 0 in reply to Mohsin
    TI__Mastermind 46195 points

    Hi Mohsin,

    Could you please attach larger images (e.g. in a zip file)?

    Please try exactly the following without writing anything else to the codec:

    Write p0_r1 = 0x80 (software reset)

    Write p0_r3 = 0x91

    Read p0_r3

    Thanks,

    J-

  • 0 in reply to J-
    Intellectual 800 points

    Hi Arbona,

     

        As requested please find the figures attached. Below is the sequence of commands.

    Write p0_r1 = 0x80 (software reset)

    Write p0_r3 = 0x91

    Read p0_r3

    Read p0_r2

     

    Also, I am using TI's LM3S9B96 as my host processor for sending these commands.

     

    Regards,

    Mohsin4705.figures.zip

  • 0 in reply to Mohsin
    Intellectual 800 points

    Hi Arbona,

     

        Did you find anything which exaplains the reading issue ?

     

    Regards,

    Mohsin

  • 0 in reply to Mohsin
    TI__Mastermind 46195 points

    Mohsin,

    From the images it looks like the read operation is doing a fast stop-start (P, S) condition instead of repeated start (Sr). I believe it should work either way, but I would take into consideration the tBUF = 4.7us between stop and start conditions when doing a fast stop-start. Please try extending the time between stop and start or, alternatively, implement a repeated-start instead.

    Regards,

    J-