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TLV320AIC3106: Master clock source

albgarc2014
Genius 3580 points

Part Number: TLV320AIC3106
Other Parts Discussed in Thread: AM4378

I am developing a system with AM437x and the TLV320AIC3106 audio codec.
In the document 'Audio Serial Interface Configurations for Audio Devices' (slaa469a.pdf) they do not suggest an Independent Master Clock (see image), but in the ARM MPU AM4378 General Purpose EVM they use this configuration (see image).

Which configuration should I use?
What are the advantages or disadvantages of each configuration?

Thank you very much. 

  • +1
    TI__Mastermind 23050 points

    Hi Lenny,

    I would always follow the recommendation in the app note. If you look at the level translator between the clocks and the AIC you will notice the MCLK and DIN are set to be inputs to the AIC while the BCLK and FSYNC are outputs, despite the arrows indicating otherwise. The AIC is actually acting as the bus master in this case generating the clocks from the MCLK so it is consistent with the app note.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    Genius 3580 points

    Hi,

    Sincerely, thank yuo very much for your clear answer!

    A happy day for you. Best Regards!