TLV320AIC3254: Issues at -40 C

Hi Bhav,

Have you isolated the issue to initialization via SPI? For an initialized device, do you see any issue when lowering the temperature to -40 C?

Best Regards. 

Hi Diljith,

Thanks for your prompt response.

Yes, we believe that it is an initialisation issue.  The issue is not seen at +25 C and +70 C.

Do you have any suggestions as to what in the codec would behave differently at -40 C that could prevent initialisation?  

Look forward to hearing from you.

Many Thanks,

Bhav

Hi Bhav,

On how many devices have to run this test and of those how many are failing.

The ADC and the DAC use a lot of blocks in common, including the PLL and SPI blocks, and therefore it is not clear how this could be an initialization issue. 

1. Could you also elaborate on what you mean by "locked up"? What is your test set up and what are the observations? Please try reading the ADC and DAC status registers.

2. Could you try doing a loop back between ADC to DAC to rule out any issues on the I2S down-link path?

3. Please send us a dump of the Page 0 and Page 1 values at -40C and +25C  as well as your device configuration values. 

Best Regards.

Hi Diljith,

I replied to your last post via email, not sure if you received this? 

Just in case, please find my response as follows:

"Apologies for my delay in reply, but this issue is still top priority for us.

Just to recap the issue is, at -40 C, the DAC output was confirmed to be Ok, but ADC output failed.

We have some more information regarding this issue:

• Number of Devices:
  • So far the -40 C failure has been seen on 10 devices out of the 20 tested.

• SPI Configuration:
  • Previously when configuring the CODEC via SPI we were not reading back what we had written.  This has been re-written to now read back the registers from the CODEC once written to. 
  • Configuration was confirmed to be correct using this code at +70 C, +25 C and -40 C. 
  • At -40 C, the DAC output was confirmed to be Ok, but ADC output failed.

• Analog Audio Bypass
  • As suggested, we attempted analog audio bypass which worked Ok at + 25 C, but failed at -40 C.

• Digital Loopback
  • We were unable to get the Digital loopback to work at 25 C (software team are looking into this).

• I2S interface
  • The Codec is used as a Slave, and as mentioned the DAC is confirmed to work -40 C which proves DIN, BCLK and WCLK signals.
  • As the ADC is not functioning at -40 C, we suspected DOUT may have an issue, mechanically i.e. solder joints, connectors etc.
    • The receipt of DOUT signal was therefore confirmed by manually configuring the codec to toggle this output at -40 C.
  • We have measured timings at +25 C and these appear to be within specification with margin.

• Codec settings
  • Attached are the settings being used to configure the CODEC.

Further to this, is there be any errata for this part that we should be aware?"

We look forward to hearing your thoughts.

Many Thanks,

Bhav

(I had attached the codec setup file we are using in the email, but not sure how to attach in this forum, please advise if you have not received this)

I checked my inbox and spam folders but did not find any email from you. I have sent you a friend request on the forum which will enable us to share information privately. 

All docs relevant to this product are linked to in the product page (https://www.ti.com/product/TLV320AIC3254). We don't have an errata doc for this part.

When you describe the ADC as being "locked up", do you mean that the DOUT is not toggling at all or that it is toggling with a given fixed pattern. What exactly is the observation?

There are two tests on which I need a few more details:

1. Analog bypass test that worked at 25C but failed at -40 C.

a) What signal path did you configure?

b) What is the analog source - Mic input or line input (have they been verified to work at -40C).

c) What test inputs were used and what were the results at 25C and -40C?

2. You mentioned that you verified DOUT functionality manually.

Bhavesh Tailor said:

The receipt of DOUT signal was therefore confirmed by manually configuring the codec to toggle this output at -40 C.

a) How did you configure the DOUT to toggle?

b) The digital loop-back (i.e. DIN to DOUT) would be a good test to verify if the DOUT is toggling correctly. What issues are you facing in implementing it?

Please re-attach the device read-back values at 25C and -40C. You can also send it to me privately after accepting the friend request.

Diljith

1. Analog Bypass

A/C) Signal path is a differential 500 Hz Sine wave into IN1 L/R (via a series 10 uF and 8k2) and bypassed through the codec and output via LOR. Please note that path is through Right Channel MicPGA, and the Mixer Amp is set to 0 dB.

B) We have attached probes to IN1 L/R and have observed the following with the source disconnected:

-> The signal is as expected prior to AC coupling, but after AC coupling we observe that the IN1 L/R level is at 0 V when we attempt to configure the codec at -40 C. When the codec is working normally, we observe the level of IN1 L/R to be at 0.75 V.

-> This 0 V level on IN1 L/R is restored to 0.75 V when the part is heated up from -40 C to ~ -12 C, without having to re-configure the part.

-> We have also observed that attempting configuration at -40 C always results in 0 V level on IN1 L/R. However, if we attempt the same configuration at -40 C changing only the CMM setting to 0.9 V in the configuration, we find the level at IN1 L/R consistently measures 0.9 V on power-up.

The symptoms, based on our limited testting, seem to suggest that the chip does not operate correctly when setting the CMM to 0.75 V at -40 C. The codec however seems to operate as expected when setting the CMM to 0.9 V.

-> Regarding this, the Application Reference Guide suggests that when setting a CMM = 0.9 V, AVDD should be 1.8 V (as opposed to 1.5 V when CMM = 0.75 V). Given we are using the internal LDO with LDOIN = 3.3 V, the AVDD produced is 1.77 V. Is the internally generated 1.77 V AVDD sufficient to utilise CM = 0.9 V over the datasheet Process-Voltage-Temperature (PVT) operating conditions, given how this setting appears to work reliably at -40 C? Please confirm as this would mean a major re-design to include an additional regulator.

2. Digital Loopback

A) DOUT was tested by assigning it as a GPIO pin and toggling it.
B) Digital loopback was not attempted as it would require a significant firmware change in our system.

3. I have sent you (via private message) the configuration settings we are setting and also the Page 0 and Page 1 register reads at -40 C and +25 C as requested. Regarding the latter, there appears to be no difference in the registers at each temperature.

I will have to check with our designers on this. We will get back to you on this.

Best Regards.

Hi Diljith,

Any updates from the designers?

We are keen on promptly getting an understanding on this.

Look forward to hearing from you.

Many Thanks,

Bhav

Hi Diljith,

Any updates on this?

Look forward to hearing from you.

Many Thanks,

Bhav

Hi Bhavesh,

We would like you check if you can get the ADC to work in single-ended mode at -40C for the failing devices.

We would like you to run an experiment using single-ended configuration for the PGA -  i.e. instead of setting P1_R57 to 0x20 set it to 0x80.

Best Regards