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Original question:

TAS5754M: Maximum Allowable Jitter for I2S Clocks

TAS5825M: I2S clock jitter

Amy Luo
Expert 6895 points
Part Number: TAS5825M

Hi team,

The TAS5825M does not require an MCLK and is generated by an internal PLL, does this mean there is no requirement for the jitter of the I2S entered? Based on this, does the PWM signal from sigma delta modulation output not sensitive to jitter, or does the TAS5825M have a high performance PLL inside?

So for I2S from Bluetooth output, is it necessary to lower the jitter?

We look forward to hearing from you

Thanks,

Amy

  • 0
    TI__Intellectual 2430 points

    Hi Amy,

                 Although TAS5825M don't need MCLK at all, but the jitter of I2S clock still needs to be avoided. Suggest you to follow the datasheet spec and keep jitter as low as possible. Or TAS5825M will trigger clock fault and there may have no sound from TAS5825M in sometimes

    BRs

    Leon