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TLV320ADC3120: Resister configuration

Michiaki Tanii
Expert 4650 points
Part Number: TLV320ADC3120


Hi team,

 

Our customer is trying to evaluate with EVM but audio output signal isn’t seen.

Here is their configuration and could you review it ? They was able to confirm the I2C communication and 44.1kHz from FSYNC.

 

<Conditions>

  • Power supply   AVDD, IOVDD = 3.3V
  • Master mode
  • LJ mode
  • MCLK(GPIO1)   44.1kHz
  • Resolution        16bit
  • Not use MICBIAS
  • Mic input          SE Input IN1P
  • Address, Value

{ 0x02, 0x81 }; // Disable Sleep mode

{ 0x21, 0xA2 }; // Configuration of MCLK to GPIO

{ 0x13, 0x8E }; // PLL

{ 0x14, 0x40 }; // 16bit output

{ 0x07, 0x80 }; // LJ mode

{ 0x3B, 0x70 }; // MICBIAS configured as GPI2

{ 0x3C, 0x2C }; // Configuration of mic

{ 0x73, 0x80 }; // input 1 EN

{ 0x74, 0x80 }; // output 1 EN

{ 0x75, 0x60 }; // 0xE0 -> 0x60 MICBIAS_PDZ : OFF

 

Thank you and best regards,

Michiaki

  • 0
    TI__Mastermind 23050 points

    Hi Michiaki,

    Are they using PPC3 to configure the EVM or their own system? One issue I see is that the input impedance in register 0x3C is set to an invalid state. They need to select either 2.5kOhm, 10kOhm, or 20kOhm for the input impedance. 

    They are also set up for master mode operation with a 24MHz MCLK. Can you confirm this is the clock frequency they are providing at GPIO1? If they are using the AC-MB then it is also necessary to make sure the S0 switch is set to OFF for external ASI.

    Best,

    Zak