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Original question:

TPA3255: Channel C & D load Instability problem

TPA3255: Channel A+B+C & D load Instability problem

Marc iegen
Prodigy 50 points

Part Number: TPA3255

Hello,

we face similar Problems as in the related Thread (https://e2e.ti.com/support/audio/f/6/t/582447?TPA3255-Channel-C-D-load-Instability-problem)

For detailed Information concern to the attached PDF please.

With regards

Marc Iegen

Probleme mit TPA3255.pdf

  • 0
    TI__Mastermind 28120 points
    Hi Marc,

    I have seen issues before on customer boards where references can follow output power when the GND of the reference caps do not have a direct path back to pins 12 and 13. Try looking at the voltage of teh VBG pin as well. If this voltage also follows the output power, then the layout of the gnd for the reference passive may need to be improved. This could be due to the return current path of the references cross near the return current of the output.

    Try lifting up the GND side of the AVDD cap and soldering a jumper wire from the gnd side of the AVDD cap to PIN 12 and 13. You can also try this with the VBG cap as well. I have seen in the past the VBG voltage rise and fall with output amplitude, causing 1 output channel to shut down. After lifting the VBG cap on the gnd side and soldering a jumper wire, the VBG voltage was stable and the channel no longer shut down.

    Justin
  • 0 in reply to Justin Bohr
    Prodigy 50 points
    Hello Justin,
    I made the recommanded changes but - as expected - nothing changed. All GNDs are stable.
    By the way: Pin 20 (VBG) is modulated as well. I changed the blocking C from 1uF to 10uF - only minor effect.
    I tried to change the TPAs mode to Mono BTL configuration ( Input C = DVDD, Outputs separated) but something went wrong during this delicate operation. I have to replace the TPA tomorrow.
    Marc
  • 0 in reply to Marc iegen
    Prodigy 50 points
    Hello Justin,
    after five days of hard work we found the issue. It wasn't the AVDD Pin but PIn 20 (VBG) that caused the trouble.
    The VBG seems to be more than extremly sensitive to wrong decoupling! (The capacity of the mounted C doesn't matter).
    Only a direct connection to PIN 12/13 (analog GND) of the blocking C does the job.
    The chips pinning turned out not to be implemented in an optimum manner.
    An alternative: a resistor 220kOhm connected from +12V to VBG. The Vrefs for the inputs change, but the TPA works. We did this first and discovered so the sensitivity of PIN20.
    The current through the bandgap is obviously at the lowest possible end.
    BTW: the first pcb sample with a slightly different layout worked from the beginning. The blocking C at PIN20 wasn't connected to PIN12/13 directly as well.... What's the accuracy of the currents flowing through the Vref circuit..?...
    The problems described appear in PBTL mode only.

    Marc
  • 0 in reply to Marc iegen
    TI__Mastermind 28120 points
    Hi Marc,

    Thanks for posting your solution. It seems you had the same issue I mention seeing before with VBG, which is why I mention trying the direct jumper with both the AVDD cap and the VBG cap. Depending on your ground plane layout, return currents could interfere with the VBG reference.

    I am not sure of the tolerance/accuracy of the VBG signal, but you saw a 6V AVDD (should be 7.8V) when your VBG was affected, because AVDD is based off of VBG.

    Justin
  • 0 in reply to Justin Bohr
    Prodigy 50 points

    Hello Justin,

    yes, the solution is found.

    But why made the chip developers VBG so sensitive? Or the other way around: why is VBG not stable enough?

    And why do these problems occure in PBTL mode only?

    The Layout of the TPA3255 EVM isn't perfect in this respect as well. Seems to be coincidence wether PBTLworks or not.

    The TPA3255s datasheet is still REV A. No hint in it that connecting the blocking C to GND is such critical.

    I think Ti can do a better job...

    Marc

  • 0 in reply to Marc iegen
    TI__Mastermind 28120 points

    Hi Marc,

    This issue only occurs if the layout of the input passives for the TPA3255 do not have a short path back to pins 12 and 13 of the TPA3255. This issue can happen in both BTL and PBTL, and I assume the reason it only happens for your PBTL design is because the input passive layout is different between your BTL and PBTL layouts. 

    You are correct that we should add some emphasis in documentation to mention the importance of managing ground return currents for reference pins when creating board layouts.

    Justin