LM98722: LM98722. Configuration Lamp outputs in CIS mode

Part Number: LM98722

Hello!

We try to use LM98722 with CIS-sensor. Key settings:
INCLK 4MGz, Mode 3, CISa mode, 3 different SH intervals.
The LM98722 initialization code with comments is below:

//Page0 - default
write_reg<0x00, 0b0010'0010>(); // [5] External INCLK; [1] Master mode

write_reg<0x02, 0b1100'0110>(); // [7:6] Mode 3;  [2] User supplies Pixel rate clock
write_reg<0x05, 0b0100'0000>(); // [7] Output - LVDS;  [6] Enable outputs;  [5] SH2 - normal

//Page2
write_reg<0x1F, 0x02>(); // Switch to Page2

write_reg<0x0D, 0x17>(); // Line length MSB (6000)
write_reg<0x0E, 0x70>(); // Line length LSB

write_reg<0x09, 0x00>(); // Active/White Pixels Start - MSB (244)
write_reg<0x0A, 0xF4>(); // Active/White Pixels Start - LSB

write_reg<0x0B, 0x14>(); // Active/White Pixels End - MSB (5136)
write_reg<0x0C, 0x10>(); // Active/White Pixels End - LSB

write_reg<0x10, 0x0000'1010>(); // [6:5] Default;  [4:3] CISa mode;  [1:0] 3 Lamps /3 SH Intervals

//Page3
write_reg<0x1F, 0x03>(); // Switch to Page3

write_reg<0x00, 0x03>(); // SH Interval 1 State 0: duration == 3 pxl period
write_reg<0x0A, 0x03>(); // SH Interval 2 State 0: duration == 3 pxl period
write_reg<0x14, 0x03>(); // SH Interval 3 State 0: duration == 3 pxl period

//Page5
write_reg<0x1F, 0x05>(); // Switch to Page5

write_reg<0x00, 0b0001'0000>(); // SH5 Outputs sets HIGH during SH Interval 1 State 0
write_reg<0x0A, 0b0001'0000>(); // SH5 Outputs sets HIGH during SH Interval 2 State 0
write_reg<0x14, 0b0001'0000>(); // SH5 Outputs sets HIGH during SH Interval 3 State 0

//Page7
write_reg<0x1F, 0x07>(); / /Switch to Page7

//SH1
write_reg<0x00, 0x00>(); //SH1 Pixel ON (83 pxl period)
write_reg<0x01, 0x53>();
write_reg<0x02, 0x04>(); //SH1 Pixel OFF (83 + 1120 pxl period)
write_reg<0x03, 0xB3>();
//SH2
write_reg<0x04, 0x00>(); //SH2 Pixel ON (83 pxl period)
write_reg<0x05, 0x53>();
write_reg<0x06, 0x04>(); //SH2 Pixel OFF (83 + 1120 pxl period)
write_reg<0x07, 0xB3>();

//SH3
write_reg<0x08, 0x00>(); //SH3 Pixel ON (83 pxl period)
write_reg<0x09, 0x53>();
write_reg<0x0A, 0x03>(); //SH3 Pixel OFF (83 + 800 pxl period)
write_reg<0x0B, 0x73>();

//Page8
write_reg<0x1F, 0x08>();  / /Switch to Page8

write_reg<0x00, 0b0100'0100>(); //PHIA1, PHIA2 Polarity, States (Active, Timing, NotInverted)

write_reg<0x04, 0b0100'0100>(); //SH1, SH2 Polarity, States (Active, Timing, NotInverted)
write_reg<0x05, 0b0100'0100>(); //SH3, SH4 Polarity, States (Active, Timing, NotInverted)
write_reg<0x06, 0b0100'0000>(); //SH5 Polarity, States (Active, Timing, NotInverted)

According to the datasheet, in this mode, the signals on SH1 - SH3 should go sequentially, as in the picture below:

But in fact, in real application, they go at the same time!

Interesting, if we change the settings to 4 different SH intervals (Page 2, register 0x10, bits 1:0 - 11), SH1 and SH2 go sequentially, while SH3 and SH4 still go simultaneously:

Does this indicate a malfunction our LM98722 chip, or some errors in the our initialization code?
I look forward to a prompt response.

Thanks in advance!