I have a design that has two of the DAC8742H HART modems connected to the same SPI bus. The issue that I am having is that the second IC is causing the amplitude of the SDO signals (MISO) from the first IC to be reduced to the point where the connected micro controller does not recognize the data. With my current setup we are only talking to one IC and I have verified that the CS line on the second IC is not being toggled (i.e. it remains high). When I probe the common SDO line (MISO) with my scope I can see the signals but they have a max voltage of just under 2V and when I cut the SDO trace to the second IC the voltage went up to just over 4V and I can communicate with the first IC. Do you have any idea why the second IC would be loading the line so much? I can see from the datasheet that when it is not in use it should be hi-Z.