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ADS8688A: Conversion performed on device's internal clock signal or on SPI SCLK signal

Gerald
Genius 9570 points
Part Number: ADS8688A

Hi Team,

May I ask for you help? Upon checking datasheet of ADS8688A section 8.4.1.1.1 and 8.4.1.2 event 1, I have few minor concern:

1. Does the internal clock pertains to the oscillator of the ADC? or SPI SCLK signal or other signal? If other signal, please elaborate. Thank you.
2. If answer to question 1 is yes(oscillator of ADC), is the clock alive all the time?

My customer said that he need the ADC to be completely quiet when no SPI /SC is not applied. Is this possible?

I hope to receive your response. Thank you so much in advance.

Gerald

  • 0
    TI__Mastermind 45715 points

    Hi Gerald,

    1. The ADC has internal conversion clock which is not related to the SCLK.

    2. Yes.

    Yes, ADS8688A supports a hardware (/RST/RD) and software (PWR_DN in program register) power-down mode which can power down all internal circuity including internal reference and buffer. However, please note that a minimum 15ms delay is required for the device to power up and conversion the selected analog input channel. Also, note that hardware power-down mode will reset the program registers to default values, but software power-down will retain the previous configurations of program registers.

    Best regards,

    Dale