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ADS1299: SPI CS signal can not be pulled down completely

Part Number: ADS1299
Other Parts Discussed in Thread: , SN74LVC1G34

Hi,

   I use a SOC to communicate with ADS1299.

   When I connect the SOC SPI lines(Din Dout CS SCLK) to ADS1299 lines, the CS signal (yellow one )seems abnormal.

I check the datasheet, the CS signal is too high to be recognized.

I disconnect the SPI lines and test the SOC's CS, I get a normal signal,

I use the ADS1299EEGFE-PDK. I don not know if there are special design for the CS signal in this development board.

Can you help me with this?

Best wishes!

Yan

  • Hi Yan,

    Are you connecting the MMB0 motherboard to the ADS1299 EVM when you are using your own SOC? You may want to isolate all the SPI and control signals that you are using from the MMB0, so there are no contentions between the two EVMs.

    Thanks

    -TC

  • Hi TCT,

    I did separate the motherboard and the ADS1299 EVM. Must I connect these two part when use it?

  • Hi Yan,

    You do not need the MMB0 board for the interface if you are using your own SOC controller. However, you will still need to provide the power supplies to the standalone ADS1299 EVM. Can you please verify your setup and all the hardware jumpers setting are correct? Please refer to the ADS1299 EVM schematic in the User Guide for guidance.

    Thanks

    -TC

  • Hi TCT,

    Thanks for your suggestion. I think the EVM setting is correct, I check the datasheet detail.

    It seems only the CS signal has a problem, because if I connect the CS in the AD EVM with GND, or use a GPIO of  my SOC to simulate the CS(high to low to high) , it works well.

    I find there is a 10k pull up R connect with the AD CS port. Should I do something special with my SOC CS signal? Is there any special requirement of the master CS signal?

    Yan

  • Hi Yan,

    Thanks for the information. The CSB signal behaves the same as the other digital input pins. There is no special requirement for the CSB for the device. I assume you are not sharing the CSB signals with any other devices in your test setup. From the original waveform, the CSB is pulled low on every SPI positive rising edge before rising a steady voltage of 1V. There seems to be some interference between the SPI signals and the CSB signals.

    It seems only the CS signal has a problem, because if I connect the CS in the AD EVM with GND, or use a GPIO of  my SOC to simulate the CS(high to low to high) , it works well.

    This is what I was going to suggest next, but it looks like you have tried it. Your test suggests there is no issue with the device CSB pin. I would suggest you review the specification of SOC CS ports for any anomalies. Please make sure all the digital ground for your SOC is connected to the ADS1299 EVM ground as well.

    Thanks

    -TC

  • Hi TCT,

    Thanks for your suggestion.I check the digital ground again to make sure the SOC and AD are good connected.

    I have test another SPI device, a flash, and I found it work well with my SOC.

    So that is very strange for this issue, it seems the AD and SOC are all work well, but when connect the two part, CS is bad.

    I choose  a GPIO to simulate the CS signal to continue my project. However,  solving this problem is perfect, do you have any other suggestions?

    Yan

  • Hi Yan,

    It is weird that the CSB is behaving in this matter for your board. Do you see any difference in DVDD current if you are using SOC CS port or the GPIO pin? It is not required, but can you verify the functionality if you can add a buffer between the SOC CS port and the device CSB pin.

    Thanks

    -TC

  • Hi TCT,

    Thanks for the idea, can you tell me what kind of buffer?You mean a hardware. I check the mother board of the ADS1299, it has a  SN74CB3T3245PW chip. Is this a kind of buffer?

    Yan

  • Hi Yan,

    You can use a simple digital logic buffer such as the SN74LVC1G34 or something similar. 

    https://www.ti.com/product/SN74LVC1G34

    Thanks

    -TC