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ADS1299-6: Does the DRDY pin toggle before the next sample

Part Number: ADS1299-6


If a single sample is missed during continuous read mode will the DRDY toggle before the next sample is available? I am concerned that we are disabling the IRQ handler when DRDY is LOW and enabling the IRQ afterward thus stopping samples from arriving into the MCU.

Thanks,

  • Hi Chris,

    Thanks for the post.

    In continuous conversion mode, if the data is not read back on DOUT after DRDYB goes low (no SCLK), it will stay low and goes high for 4 tCLK before returning back low, indicating new data is ready. Please see the diagram below for reference. Please note that DRDYB will go high on the first SCLK falling edge regardless of whether data are being retrieved from the device or a command is being sent through the DIN pin.

    Thanks

    -TC

  • Ok, so before every new sample the DRDY pin will go high for 4 tCLK cycles? Essentially, it only stays low for time of tDR - 4*tCLK, and the data must be read in that time frame.

    As long as the IRQ is re-enabled and the ADS remains in continuous read I will eventually detect the DRDY going LOW. I may miss a few samples during the disabled IRQ, but that is expected.

    Is my understanding correct?

    Thank you again for your help,

  • Hi Chris,

    Ok, so before every new sample the DRDY pin will go high for 4 tCLK cycles? Essentially, it only stays low for time of tDR - 4*tCLK, and the data must be read in that time frame.

    This is the case if there is no SCLK to the device (for data read or command). The new data is updated during the 4 tCLK cycles and reading data should be avoided.

    As long as the IRQ is re-enabled and the ADS remains in continuous read I will eventually detect the DRDY going LOW. I may miss a few samples during the disabled IRQ, but that is expected.

    Yes, this is correct. 

    Thank

    -TC