Part Number: ADS8588H
Hello,
we use ADS8588H and want to sample all 8 input channels with 500kSPS. We use the serial interface in "data read during conversion" mode, using DOUTA and DOUTB outputs for fast data transfer.
In the above mentioned mode, 4x16=64 Clocks are required to transfer all 8 16-Bit words via DOUTA and DOUTB.
According to para. 6.10 of the datasheet, the min. SCLK time period is defined with 50ns, which would lead to ~ 64 Clocks * 50ns = 3.2µs, which corresponds to a throughput of roughly 312kSPS.
Could you please clarify this mismatch (500kSPS vs. ~312kSPS considering min. t_SCLK of 50ns)?
Thank you!
