Original question:
Part Number: DAC81416
Hi
DAC output is 0V. I have used the following code
Write 0x0A 0x0000 // Configure for 0 to 5V
Write 0x03 0x0A84 // Device in active mode
Write 0x04 0x3F00 // Enable Internal Reference
Write 0x09 0x0000 // Power up all channels
Write 0x10 0x7FFF // Write mid code to DAC 0
Write 0x1F 0xFFFF // Write full code to DAC 15
Pins Configured as
Toggle0 = Toggle1 = Toggle2 = Gnd
LDAC = RESET = CLR = VIO (5V)
SPI lines
Thanks in Advance.
Hi Amit,
Do you see a voltage on the reference pin? Your schematic looks ok to me so. If the internal reference is powered it will let us know if your SPI communication is working. Have you been able to read back any registers to verify they have been written to properly?
Taking a look at your SPI lines, it looks like the data is being setup on the falling edge. The DAC clocks the data in on the falling edge so the controller will need to setup the data on the rising edge. Verify that you are using the right SPI mode and that the timing requirements are being met:
Best,
Katlynne Jones
Hi Katlynne,
I have tried updating the settings but still no change in output. I am unable to read the Device ID or the Device ID is read wrong.
Updated settings for SPI
MCU used STM32H743i
CLK=250 KHz
CPOL=1
CPHA=0
Thanks in advance.
Hi I have tred the updated settings and now I get the below output
CLK=250 KHz
CPOL=0
CPHA=1
Code read,
Write 0x81 0x0000 // Set read command for code id
Write 0x00 0x0000 // Dummy write cycle to read code id on MISO
From your waveform I can see. the DAC chipe ID is 0xA70. Is that right?
I can get these.
Why this extra clock edge before CS rising, this may shift data inside. this occur both cycle ,correct issue.
