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The rightmost vertical line disappears.

Eddie Chang
Prodigy 60 points
Other Parts Discussed in Thread: THS8200, TVP7002

Hello Larry,

 

We're using THS8200 for a project. It is strange that we found the rightmost vertical line sometime disappears, but sometime appears. This symptom sometime can be recovered by disconnecting cable and then reconnecting it many times. Also, it only occurs with SD formats (D1-525(720x486) & D2-625(720x576)). I have set all register values as recommendation except 0x1C and 0x82. For our project, we need to select 20bit or 10bit mode rather than 30bit mode as recommendation. I have tried to decrease the width of front porch (0x2F: 0x14->0x10), but it still does't work. But, if I select the 30bit mode, the rightmost line always displays. So, I am wondering is there any way that I could solve this problem without setting it in 30bit mode? Btw, I have checked the digital input data and the input is correct for sure.

 

0x1C: 0x60(recommendation) -> 0x5C

0x82: 0x83(recommendation) -> 0xA3

 

 

Eddie

  • 0
    TI__Genius 16810 points

    Eddie,

    Does the vertical line at the left border shift, when line at the right border disappears?  I am trying to deterrmine if the picture is shifting, or if the line is being cropped without shifting.

  • 0 in reply to Larry Taylor
    Prodigy 60 points

    Hello Larry,

    I had checked the output waveform and the rightmost line did disappear. Also, I tried to shift the picture position by setting 0x7A, but it doesn't work. It is strange that I found evaluation board (TVP700X EVM REV1.0 + THS8200EVM REV2.0) has the same symptom when I set TVP700X to output 20bit 4:2:2 format and THS8200 to receive 20bit 4:2:2 format.

    It seems that the only way to solve this problem is to set THS8200 to receive 30bit input data (0x1C: 0x60) and derive embedded sync form HS, VS, and FID (0x82: 0x83). Unfortunately, our front-end IC is only able to output 10/20bit 4:2:2 format. Do you have any idea of how to solve this problem?

  • 0 in reply to Eddie Chang
    TI__Genius 16810 points

    Eddie,

    I have some more questions about your setup.

    Are you outputting YPbPr?

    Are you using the color space converter?

    Is the missing line on the Y output?   It more likley that swithcing to 20-bit 422 would affect PbPr instead of Y output.

  • 0 in reply to Larry Taylor
    TI__Genius 16810 points

    Eddie,

    Regarding the TVP7002>THS8200 obserrvations, this could be related to the HPLL sampling phase.  Try increasing the HPLL phase setting in the TVP7002 REG04h to see if the line appears.  This is effective here with my EVM setup.

    What type of digital source is being used in your design?

  • 0 in reply to Larry Taylor
    Prodigy 60 points
    Hello Larry, Followings are my settings: Output YPbPr -> 0x82 = 0xA3 Bypass CSC -> 0x19 = 0x03 10bit 422 mode -> 0x1C = 0x5C The digital source is from a SDI deserializer IC. I attached the output waveform from the deserializer. The left pic displays with black pattern, and the right pic displays with frame pattern. You can observe that the rightmost line does appear in the output of deserializer IC.
  • 0 in reply to Eddie Chang
    TI__Genius 16810 points

    Eddie,

    What video format are using for the 10-bit 422 setup and the 20-bit 422 setup that you used with the EVM?

    Can you read back the THS8200 dtg_pixel_cnt [15:0] numerous times to check for pixels/line and consistency seen by the THS8200?  This will report active pixels/line seen by the THS8200 embedded sysnc decode and should corelate with the dtg1_total_pixels [12:0] setting be used.