DAC81416: Question about "write operation error checking cycle"

Hello,

How are you reading/capturing the error checking for the write cycle? From your second image it looks like the SDO pin is echoing a 1 in the R/W bit. If you are capturing the error checking for a write cycle, this bit should be 0. 

Best,

Katlynne Jones

Yes, datasheet says me that If you are capturing the error checking for a write cycle, RW bit should be 0. But I see that RW bit is '1' for both read and write error checking cycles. 
For write and read error checking cycle I write 0x0000 to NOP register as you can see on the second and fourth images.
First and second images are sequential SPI accesses.

Hello,

I've ordered a DAC81416EVM so I can try to read back the error checking cycles for a read and write. It looks to me like your method is correct so I am unsure why you are getting the incorrect echo on the SDO pin. Can you also send the code that you are using for the write and reads so I can go over it?

Thank you,

Katlynne Jones

Thank you for your help! Unfortunately we work with custom board and we don't have direct SPI access from processor to DAC81416. We have ARM Axi bus->1st FPGA LVDS Serializer->2nd FPGA LVDS Deserializer->2nd FPGA spi controller->DAC81416. I think my code is not useful for you. But what about spi words:
For write I use next:
1st cycle $((((0x0)<<31)|(0x6<<24)|(SpiWrData<<0x0000)|0x7D))
2nd cycle("write operation error checking cycle") $((((0x0)<<31)|(0<<24)|(0<<8)))
You can see 2nd FPGA spi controller->DAC81416 spi timing diagrams on the first and second images.

Hi,

This is Anbu Mani , like understand more about you setup.

Iam thinking this may be SPI timing issue like setup/hold time requirement. the picture which you shared seems FPGA logic analyzer ( ex. chipscope probe).

Did you checked timings information are meet with your setup

Is it possible share the oscilloscope capture where we can see any timing violation create this issue.

meanwhile i will try in our EVM how it behave.  

Hi, I will capture it using oscilloscope, but I need couple of days.

OK.

Hi, my colleague ask me capture SPI data using oscilloscope(Oscilloscope has only 2 channels). SCLK period is 80ns.
I write 0x0000 data to 0x06 address(calculated CRC-8-ATM = 0x7D).
1st spi cycle:
Green - SCLK. Yellow - SDI

Green - SCLK. Yellow - SDO

Green - SCLK. Yellow - CS

After that I have 2nd cycle ("write operation error checking cycle"):

Green - SCLK. Yellow - SDI

Green - SCLK. Yellow - SDO

Green - SCLK. Yellow - CS

We can see that oscilloscope pictures are same as we see using FPGA chipscope in my 1st post.
DAC81416 give me "wrong" CRC.
But if I give "wrong CRC"(0x7E) on the SDI pin then DAC81416 set CRC-ERROR on the SDO pin but give me "wrong" CRC also:

1st cycle:

2nd cycle("write operation error checking cycle"):

Hi,  give me some time i will get back to you.

Hi , 

I checked with EVM here and  getting similar result.

1st cycle

2nd cycle

i will get back you why it happing and any other setting to be done for CRC.

Ok, thanks

Hi Alexander,

Could you please share your CRC calculation code 

Hi, I use this calculator:
www.ghsi.de/.../index.php

Hi, 

Thanks for sharing link.  i already forward issue with our design team. will update you ASAP. 

Ok, thanks

Hi Alexander,

Thankyou for your patience.

i discussed with our design team , basically we need additional dummy write to get correct CRC value.

1. Write data <0000> at address <06>

Writing ->  06 00 00 7D  // calculated CRC 7D for  <06 00 00>

Writing ->  86 00 00 76  // Set read cmd for next cycle,  calculated CRC 76 for  <86 00 00>

Writing ->  00 00 00 00  // NOP cycle to read CRC with data  <00 00 00> , CRC of 76 out on SDO line 

Note: here device will send out CRC value based on readcmd <86 00 00> = 76

2. Write data <3333> at address <06>

Another example different data 0x3333  

Write,  06 33 33 22// <add + data> + CRC

Write, 86 00 00 76 //  set read cmd

Write, 00 00 00 00 //  dummy cycle to read CRC to get CRC=29, calculated <86 33 33>

Hope this answered your query. 

Ok, I see, thanks