Hi Team,
Having a chain of DDC112, it is 4 PCB, each of its contain 8 DDC112 chips. For control of this structure they use MCU (stm32), In reference on the datasheets for DDC112 control scheme is correct, but there are 2 issues all time:
1) DVALID signal occurs from 370 microseconds, but it must occur from 421 usec for First conversion and 454 usec for the second.
2) When they use test mode they get the same result for each side A and B, but I set different charges for each side. For A it is 1 charge (13pC), for B side it is 3 charge (39pC), but the result of the integrated circuit is the same for all sides.
A little bit about using scheme: it is non-conversion mode, 50 microseconds integration time, 300 Hz frequency of integration, 10 MHz of CLK, and 6.25 MHz of DCLK. In their opinion, the First problem occur because of power-up problems
Hoping for your inputs.
Thank you.
-Mark
