Other Parts Discussed in Thread: LMK04828, LMX2594
Board architecture:three ADC12DJ3200+one XILINX FPGA(7V690T)
ADC MODE:Single mode
ADC Sample rate:6G @ JMODE2
GTH Line rate:12GHz
FPGA CLK Frequence:300MHz
FPGA GTH BANK CLK:300MHz
sysref CLK Frequence:9.375MHz
When adc input signal is a broadband signal continuously,the rx_sync signal is stable.When adc input signal is a discontinuous broadband signal,the rx_sync signal is not stable.What is the difference between these two input signals for adc?
Note: When the input signal is a single frequency(Such as: 700mhz ), the sync signal is also stable.