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ADS127L11: SPI communications - ADC_ERR

Part Number: ADS127L11

Greetings.

I am having some trouble working with this device using SPI.

Specifically, after initializing the device, I query the status register and constantly read the ADC_ERR flag.

My init sequence is:

  • ensure CLK line is low
  • ensure START line is low
  • bring nRESET line low
  • wait 1 ms
  • bring nRESET line high
  • wait 500 ms

Then, I subsequently read the status register, which comes back with 0x24 (POR_FLAG + ADC_ERR)

Reading any other registers (eg: REV_ID, GAIN1) reads back a correct value.

SPI clock speed is set to 1.6 Mhz.

Frame size is 3 bytes (24bits)

I included images from the logic analyzer.

Any guidance on why I might be getting the error would be extremely helpful!

AVDD1 = AVDD2 = 4.5v

IOVDD = 3.3v

Thank you.

  • Hello Paul,

    Welcome to the TI E2E community.

    My apologies, but this is a production test bug in the device that we recently identified, which results in this flag always getting set.  There is nothing you can do to reset this flag, but it will not effect the operation of the device.

    It looks like you have everything else working correctly, so please ignore this flag on these pre-production devices.  This will be corrected on the fully released devices.

    Thanks!

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Excellent!  This was driving me crazy!

    It would be good to include details about what causes this error in the documentation.

  • Keith,

    As I'm currently working on a design with this exact ADC, are there any other surprises that have been discovered with the pre-production parts?  Is any of this documented anywhere?  I'm just a few days away from talking to the part, and something like this would have driven me crazy trying to track down as well.

    Thank You,

    Ben

  • Hi Ben,

    There are no other issues, other than a clarification that will be updated in the next version of the datasheet.

    This only applies to STOP/START control mode (8.4.6.2 in datasheet) function when using SPI.  After writing 1b to the STOP bit in the CONTROL register, the entire CONTROL register should then be cleared by writing 0x00h following the write to the STOP bit.

    I hope this helps!  If you have further questions regarding the ADS127L11, please feel free to create a new E2E thread.

    Thanks,
    Keith