ADC128S102: There is oscillation signal even if no signal input

Hello, 

I see from your schematic that the ground pins are connected to different signals, I suggest to connect both grounds to the same signal. Also, the decoupling capacitors seem to be connected to the same power rail, but connected to different ground signals, all four of these capacitors should be connected to the same ground signal.  Is your PCB partitioned?

The graphs that you shared, can you explain what the axis represent? I was thinking that the Y axis was the decimal output, but there are points above 5000, which is not possible, as this is a 12 bit device, and the highest decimal output value possible is 4095. 

If these oscillations are seen in the SPI measured output of the ADC. i would suggest taking a scope probe on the digital lines and confirmation communication is as expected. 

Regards

Cynthia

This is part of my design. GNDA and GNDD is connected by a 0Ω resistance.

I sample channel 0-5 and then 5-0. The y axis is the sum of the two measurement results respectively.

Hello, apologies for the late response

Are still having trouble with this? You mentioned that when changing the clock speed, one ADC seem to be fixed, but another that did not have a problem then did show the same issue. Are these two different devices, or are these both ADC128?

This could mean that 1.there is coupling issues occurring on your board or 2. the input is not settling at the faster speed. 

Regards

Cynthia

Maybe I found a workaround but the result is not good enough. After changing C24 to 100nF , connecting IN4 and  IN5 to the ground , removing extra RX/TX serial pins and changing SPI clock to 4M, the oscillation disappeared.  But in this way, the sampling rate is lower than my expect and the signal quality is not good.

These are both ADC128. They are same design on the same board. What do you mean " the input is not settling at the faster speed."?

part of my design. Finally I remove the pins in the blue block.

ADC layout

Measurement result. Input 80M/80.002M beat signal(the result should be a 2k sine signal) and use 8M SPI clock

We look forward to your reply as soon as possible

Best Regards

James Man

 An input settling error is when the input does not have enough time to drive the ADC input to the desired input voltage level. the work around you shared had segment both possibilities. Decreasing the input capacitor means that the input was not settling, an even smaller cap would help, i would suggest a 660pF. This value is 20x the ADC input capacitor. 

Leaving channels floating can make device susceptible to noise, it is good practice to ground any unused analog inputs. 

The RX/TX signal issue could be a result of layout. I am not sure which trace it is, but for devices such as ADC, it is good practice to law out the board with analog and digital spaces separate, for example, all the analog on the left and the digital on the right, with minimum crossing, even through different layers. 

Thanks for your reply. But it seems not work. I change the cap to 680pF and the oscillation still exists. I have tried several RC combinations but not work.

remove the cap

68pF and 1.1k ohm

680pF and 1.1k ohm

And I find that if I choose C=47nF and R=1.1k ohm, the frequency of the oscillation is approximately 3kHz and the wave is smoother.

Thank you very much! Although there still exists oscillation, the amplitude is smaller and it seems does not affect the measurement.

680pF and 100k ohm