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ADS7952: timing

Part Number: ADS7952

Hi, 

My question is the delay time from SCLK falling to SDO next data bit valid @3V Vcc, the data sheet shows 27ns max, what the condition the max delay time will be, the typical reading in my design is 16ns. my timing analysis show we only have 19ns allowed. Vcc=3.3V.

Thanks,