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ADS8588SEVM-PDK: Not able to configure the ADC in SPI mode

Part Number: ADS8588SEVM-PDK
Other Parts Discussed in Thread: ADS8588S

Hi,

I have the ADS8588S ADC on a ADS8588EVM evaluation board.  I am not using the PHY board, only the ADC board.

I hooked the signals to the Teensy 4.1 for control.

On the ADC board, the PAR/SER/BYTE SEL signal is tied to DVDD (3v3) using the jumper J3.

The DB15/BYTE SEL is already pulled to DGND on board.

All the data out DB[15:9] and DB[6:0] are tied to DGND except of course DOUTA (DB7) and DOUTB (DB8).

CONVSTA and CONVSTB are tied together.

I am using AVDD external with  J10 (1-2) and connecting 5V from my USB to connector J11 (the 5V USB is clean, for now the purpose is to be able to make the SPI work... ACCURACY will come after :))

I am using the DVDD external on J12

All that being configured, I am not able to get the ADC to communicate in SPI mode.

Here is the sequence that is not working for me:

1 - Pulse CONVSTA/B (from HIgh to Low to High) (2 us pulse)

2 - Wait for the BUSY signal to complete the conversion (wait the falling edge)

3 - 2 us after the BUSY signal goes LOW, set CS from High to Low

4 - start SCLK at 1 MHz

5 - collect the 8 samples.

When I look at the scope, all that sequence is OK but I can see FIRSTDATA pulse after each 8 SCLK transition.

Seeing that tells me that the ADC is still in parallel mode.

Did a miss anything on the HW side or the Configuration side to set the ADC in serial mode?

Any specific attention to the noise or other signals to recommand that I could look at?

Please let me know if you can help me.

Regards,

Pierre-Luc