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DAC8760: Readback mode for Configuration register

Part Number: DAC8760

Hi Experts,

When CRC is enabled(CRCEN = 1), what is the readback timing for Configuration register? Below is the figure for non-CRC mode. Which bit includes CRC from DAC?

Regards,

Uchikoshi

  • Uchikoshi-san,

    I'm not sure what the device does for readback CRC. I've never been asked this and I haven't seen any documentation on this topic. I'll need to check with design on this one or see if I can check it in the lab. 

    This may take a couple of days to get back. I'll let you know what I find soon.

    Joseph Wu

  • Uchikoshi-san,

    I did take a quick look at this, and it appears that the CRC is calculated with the 24-bit data, and then the 8-bit CRC follows. I would note that for all the cases that I saw, SDO was always 0s for the first 8 bits - there were no 1's in the don't care bits. Because of this, I can't be absolutely certain.

    However, I've never seen any 1's in the don't care bits anytime I've ever read from the device. I think it's reasonable to calculate the CRC from all 24-bit data.

    Joseph Wu